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IEEE Transactions on Components, Packaging, and Manufacturing Technology Part B: Advanced Packaging

May 1996, Volume 19, Issue 2

CONTRIBUTIONS FROM THE THIRD TOPICAL MEETING ON THE ELECTRICAL PERFORMANCE OF ELECTRONIC PACKAGING

FOREWORD

J. L. Prince

Estimating Crosstalk in Multiconductor Transmission Lines

C. Gordon and K. M. Roselle

Millimeter-Wave Monolithic Integrated Circuit Interconnects Using Electromagnetic Field Coupling

G. Strauss and W. S. Menzel

Efficient Reduced-Order Modeling of Frequency-Dependent Coupling Inductances Associated with 3-D Interconnect Structures

L. M. Silveira, M. Kamon, and J. White

A New Algorithm for Experimental Circuit Modeling of Interconnection Structures Based on Causality

S. Sercu and L. Martens

CONTRIBUTIONS FROM THE 45th ELECTRONIC COMPONENTS AND MANUFACTURING TECHNOLOGY CONFERENCE (ECTC)

Importance of Molding Compound Chemical Shrinkage in the Stress and Warpage Analysis of PQFP's

G. Kelly, C. Lyden, W. Lawton, J. Barrett, A. Saboui, H. Pape, and H. Peters

Effect of Adhesive Surface Chemistry and Morphology on Package Cracking in Tapeless Lead-On-Chip (LOC) Packages

M. Amagai

Improved Yield and Performance of Ball-Grid Array Packages: Design and Processing Guidelines for Uniform and Nonuniform Arrays

S. M. Heinrich, S. Shakya, Y. Wang, P. S. Lee, and S. A. Schroeder

Effect of PCB Finish on the Reliability and Wettability of Ball Grid Array Packages

E. Bradley and K. Banerji

REGULAR PAPERS

Electrical Modeling and Measurement

Broadband Characterization of Low Dielectric Constant and Low Dielectric Loss CYTUF$^{{\rm{TM}}}$ Cyanate Ester Printed Circuit Board Material

A. Deutsch, C. W. Surovic, A. P. Lanzetta, H. A. Ainspan, J.-C. Abbiate, A. Viehbeck, J. C. Hedrick, J. M. Shaw, S. L. Tisdale, E. F. Foster, and P. W. Coteus

An Experimental Technique for Full Package Inductance Matrix Characterization

C.-T. Tsai and W.-Y. Yip

Accurate Simultaneous Switching Noise Estimation Including Velocity-Saturation Effects

S. R. Vemuru

Noise Computation in Single Chip Packages

K. Bathey, M. Swaminathan, L. D. Smith, and T. J. Cockerill

Ground Noise Minimization in Integrated Circuit Packages through Pin Assignment Optimization

J. M. Williamson, M. S. Nakhla, Q.-J. Zhang, and P. D. van der Puije

Guidelines for High-Performance Electronic Package Interconnections---Approach for Strong Coupling

Y. Yang and J. R. Brews

Electrical Performance of Interconnects in Polyimide–Copper Thin Film Multilayers on Ceramic Substrate

M. Bedouani, D. Lambert, and K. Kurzweil

MCM and PCB Design and Fabrication

Limitation of the Signal Pin Density on Wiring Boards

T. Chiba, M. Yamada, and F. Kobayashi

Flat Spiral Delay Line Design with Minimum Crosstalk Penalty

R.-B. Wu and F.-L. Chao

A Chips-First Multichip Module Implementation of Passive and Active Test Coupons Utilizing Texas Instruments' High Density Interconnect Technology

T. M. Schaefer, J. J. Kacines, B. A. Randall, L. E. Roszel, G. J. Fokken, D. Walter, D. J. Schwab, L. Mowatt, and B. K. Gilbert

Adhesion Enhancement and Lamination of Polyimide Films

N. C. Stoffel, M. Hsieh, E. J. Kramer, and W. Volksen

Effect of Surface Energies on Screen Printing Resolution

T.-X. Liang, W. Z. Sun, L.-D. Wang, Y. H. Wang, and H.-D. Li

Thermal and Cooling Analysis

Thermal Performance Comparison of High Pin Count Cavity-Up Enhanced Plastic Ball Grid Array (EPBGA) Packages

A. Mertol

A Very High Heat Flux Microchannel Heat Exchanger for Cooling of Semiconductor Laser Diode Arrays

S. K. Roy and B. L. Avanic

ANNOUNCEMENTS

List of Reviewers

Call for Papers: 5th Topical Meeting on the Electrical Performance of Electronic Packaging