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IEEE Transactions on Components, Packaging, and Manufacturing Technology Part B:
Advanced Packaging
August 1998, Volume 21, Number 03
- Editorial
- J.
P. Krusius
[p. 1]
REGULAR PAPERS
Electrical Modeling and Performance
- Interconnect and Circuit Modeling Techniques for
Full-Chip Power Supply Noise
Analysis
- H.
H. Chen and J. S. Neely
[p. 209]
- A New Approach for the Modeling and
Simulation of Electromagnetic
Interference
- P. Nordholz and H.
Grabinski
[p. 216]
- Automatic Generation of Accurate Circuit Models of 3-D
Interconnect
- M.
Kamon, N. A. Marques, L. M. Silveira, and J.
White
[p. 225]
- A Technique for Fast Calculation of
Capacitance Matrices of Interconnect
Structures
- V. Veremey and R.
Mittra
[p. 241]
- Dynamic Analysis of V Transmission
Lines
- O. M. Ramahi, A. Z. Elsherbeni, and
C. E. Smith
[p. 250]
Integrated Components
- Characterization of Embedded Passives Using Macromodels in
LTCC
Technology
- K.
L. Choi, N. Na, and M. Swaminathan
[p. 258]
- Characterization of a Planar Spiral Inductor on a
Composite-Resin Low-Impedance Substrate and Its Application to Microwave
Circuits
- H.
Okabe, H. Yamada, M. Yamasaki, O. Kagaya, K. Sekine, and K.
Yamashita
[p. 269]
- Composite and Multilayered
TaOx-TiOy
High Dielectric Constant Thin
Films
- M.
C. Nielsen, J.-Y. Kim, E. J. Rymaszewski, T.-M. Lu, A. Kumar, and H.
Bakhru
[p. 274]
Packaging and Interconnects
- Figures-of-Merit for Package Electrical
Roadmaps
- B.
Young
[p. 281]
- S/390 Cost Performance Considerations for MCM Packaging
Choices
- G. A. Katopis and W. D.
Becker
[p. 286]
- Design Methodology for Chip-on-Chip
Applications
- Y.
L. Low, R. C. Frye, and K. J. O'Connor
[p. 298]
- Ultra Low Loss Millimeter Wave Multichip Module
Interconnects
- A.-V.
H. Pham, J. Laskar, V. B. Krishnamurthy, H. S. Cole, and T.
Sitnik-Nieters
[p. 302]
- Low-Cost AlGaAs/GaAs HBT Multi-Gigabit Limiting
Amplifier Packaged with a New Plastic Air Tight Cavity Encapsulation
Process
- B.
Kwark, D. S. Ma, H. Seo, K. Ham, and M. S.
Park
[p. 309]
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