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IEEE Transactions on Components, Packaging, and Manufacturing Technology Part B: Advanced Packaging

November 1998, Volume 21, Number 04

CONTRIBUTIONS FROM THE 2ND IEEE INTERNATIONAL CONFERENCE ON INNOVATIVE SYSTEMS IN SILICON

Foreword

H. Bolouri and L. E. LaForge

[p. 322]

Review and Summary of a Silicon Micromachined Gas Chromatography System

E. S. Kolesar and R. R. Reston

[p. 324]

Microfluidic MEMS for Semiconductor Processing

A. K. Henning, J. S. Fitch, J. M. Harris,E. B. Dehan, B. A. Cozad, L. Christel, Y. Fathi, D. A. Hopkins, Jr., L. J. Lilly, W. McCulley, W. A. Weber, and M. Zdeblick

[p. 329]

Architecture, Defect Tolerance, and Buffer Design for a New ATM Switch

V. K. Jain, L. Lin, and S. Horiguchi

[p. 338]

Programmable Neural Logic

V. Bohossian, P. Hasler, and J. Bruck

[p. 346]

Possibilities and Limitations of I_DDQ Testing in Submicron CMOS

J. Figueras and A. Ferre

[p. 352]

Economics Modeling of Multichip Modules Testing Strategies

M. Abadir

[p. 360]

REGULAR PAPERS

Chip and Package Connections

Solder-Jetted Eutectic PbSn Bumps for Flip-Chip

A. F. J. Baggerman and D. Schwarzbach

[p. 371]

Polymeric Conductive Pastes as Solder Replacement for Flip-Chip Attachment

K. U. Maner, S. S. Ang, L. W. Schaper, and W. D. Brown

[p. 382]

Interface Reaction between Ag-Pd Conductor and Pd-Sn Solder

Y. Moriya, Y. Yamade, and R. Shinya

[p. 394]

Aging Effects on Shear Fatigue Life and Shear Strength of Soldered Thick Film Joints

G. Y. Li and Y. C. Chan

[p. 398]

Advanced Packaging Structures

Numerical Stress Analysis of Resin Cracking in LSI Plastic Packages under Temperature Cyclic Loading--Part III: Material Properties and Package Geometries

T. Saitoh, H. Matsuyama, and M. Toya

[p. 407]

Effective Material Properties and Thermal Stress Analysis of Epoxy Molding Compound in Electronic Packaging

D. K. Shin and J. J. Lee

[p. 413]

Linear Fracture Mechanics Analysis on Growth of Interfacial Delamination in LSI Plastic Packages under Temperature Cyclic Loading

T. Saitoh, H. Matsuyama, and M. Toya

[p. 422]

Electrical Modeling and Performance

A Low-Cost Technique for Reducing the Simultaneous Switching Noise in Sub-Board Packaging Configurations

S. Koike and K. Kaizu

[p. 428]

Effects of Floating Planes in Three-Dimensional Packaging Structures on Simultaneous Switching Noise

L. Vakanas, S. Hasan, A. Cangellaris, and J. L. Prince

[p. 434]

Dielectric Constant and Loss Tangent Measurement Using a Stripline Fixture

H. Yue, K. L. Virga, and J. L. Prince

[p. 441]

Packaging and Interconnects

An 8-Bit 2-Gigasample/Second A/D Converter Multichip Module for Digital Receiver Demonstration on Navy AN/APS-145 E2-C Airborne Early Warning Aircraft Radar

R. L. Thompson, M. J. Degerstrom, W. L. Walters,M. E. Vickberg, P. J. Riemer, E. L. H. Amundsen, and B. K. Gilbert

[p. 447]

Microstrip-to-Microstrip Interconnects with Adhesive Bonded Ribbons for Micro- and Millimeterwave Applications

W. Pohlmann, A. F. Jacob, and H. Schäfer

[p. 463]

Optoelectronic Packaging

Multidimensional VCSEL-Array Push/Pull Module Fabricated Using the Self-Alignment Mounting Technique

H. Kosaka, M. Kajita, and Y. Sugimoto

[p. 471]

ANNOUNCEMENTS

Editor-in-Chief's Statement

J. P. Krusius

[p. 479]

Foreword--Contributions from the 6th Topical Meeting on Electrical Performance of Electronic Packaging

A. Deutsch and J. L. Prince

[p. 480]

Correction--1997 List of Reviewers

J. P. Krusius

[p. 482]

1998 INDEX

[p. 483]