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October 1998, Volume 21, Number 04

Editorial

W. J. Trybula

[p. 245]

Abstracts

[p. 246]

CONTRIBUTIONS FROM THE 19TH ELECTRICAL OVERSTRESS/ELECTROSTATIC DISCHARGE SYMPOSIUM

Foreword

K. G. Verhaege

[p. 249]

Protection of High Voltage Power and Programming Pins

T. J. Maloney, K. K. Parat, N. K. Clark, and A. Darwish

[p. 250]

A Study of ESD Protection Devices for Input Pins Discharge Characteristics of Diode, Lateral Bipolar Transistor, and Thyristor under MM and HBM Tests

H. Ishizuka, K. Okuyama, K. Kubota, M. Komuro, and Y. Hara

[p. 257]

The Impact of Technology Scaling on ESD Robustness of Aluminum and Copper Interconnects in Advanced Semiconductor Technologies

S. H. Voldman

[p. 265]

Very Fast Transmission Line Pulsing of Integrated Structures and the Charged Device Model

H. Gieser and M. Haunschild

[p. 278]

Influence of Well Profile and Gate Length on the ESD Performance of a Fully Silicided 0.25 &mgr;m CMOS Technology

K. Bock, C. Russ, G. Badenes, G. Groeseneken, and L. Deferm

[p. 286]

REGULAR PAPERS

Energy Model for End-of-Life Computer Disposition

T. A. Aanstoos, V. M. Torres, and S. P. Nichols

[p. 295]

Heat-Transfer Enhancing Features for Handler Tray-Type Device Carriers

A. C. Pfahnl, J. H. Lienhard V, and A. H. Slocum

[p. 302]

Use of Compliant Adhesives in the Large Area Processing of MCM-D Substrates

J. Wu, R. T. Pike, and C. P. Wong

[p. 311]

The Behavior of Solder Pastes in Stencil Printing with Vibrating Squeegee

D. He, N. N. Ekere, and M. A. Currie

[p. 317]

Compression Flow Modeling of Underfill Encapsulants for Low Cost Flip Chip Assembly

N. W. Pascarella and D. F. Baldwin

[p. 325]

1998 INDEX

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[p. 335]