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IEEE Transactions on Semiconductor Manufacturing
February 1996, Volume 9, Issue 1
SPECIAL SECTION ON ICMTS
-
Guest Editorial
-
Y.
Tomaki
SPECIAL SECTION PAPERS
-
The Floating Gate Measurement Technique
for Characterization of Capacitor
Matching
-
H.
P. Tuinhout, H. Elzinga, J. T. Brugman, and F.
Postma
-
Measurement of Contact Resistance Distribution Using a
4k-Contacts
Array
-
T.
Hamamoto, T. Ozaki, M. Aoki, and Y.
Ishibashi
-
Experimental Study of Electromigration at Bamboo
Grain Boundaries with a
New Test Structure Using the Single-Crystal Aluminum
Interconnection
-
K. Kusuyama, Y. Nakajima, and
Y. Murakami
-
A New Characterization of
Sub-$\mu$m Parallel Multilevel
Interconnects and Experimental
Verification
-
K.
Aoyama, K. Ise, H. Sato, K. Tsuneno, and H.
Masuda
-
Influence of Short Circuits on Data of Contact and Via
Open Circuits
Determined by a Novel Weave Test
Structure
-
C.
Hess and L. H. Weiland
REGULAR ISSUE PAPERS
- Simulation
-
Heterogeneous Process Simulation Tool
Integration
-
Z.
H. Sahul, K. C. Wang, Z.-K. Hsiau, E. W. McKenna, and
R. W. Dutton
-
Monte Carlo Simulation of Arsenic Ion Implantation in
(100)
Single-Crystal
Silicon
-
S.-H.
Yang, S. J. Morris, S. Tian, K. B. Parab,
and A. F. Tasch, Jr.
-
A
Continuous and General Model for Boron Diffusion During Post-Implant
Annealing Including Damaged and Amorphizing
Conditions
-
B.
Baccus and E. Vandenbossche
-
3-D Simulation of LPCVD Using Segment-Based Topography
Discretization
-
E.
B\"{a}r and J.
Lorenz
-
Comparing Models for the Growth of Silicon-Rich Oxides
(SRO)
-
G.
D\"{u}ndar and K.
Rose
-
Extracting Solid Conductors from a Single Triangulated
Surface
Representation for Interconnect
Analysis
-
J.
F. Sefler and A. R. Neureuther
- Process Control
-
Improvements in
$C_{pk}$ Using Real-Time Feedback
Control
-
K.
El-Awady, C. Schaper, and T. Kailath
-
A Neural Network Model of a Contact Plasma Etch Process
for VLSI
Production
-
E.
A. Rietman
-
A Novel In-Line Automated Metrology for
Photolithography
-
S.
Leang and C. J. Spanos
-
Manufacturing Issues Related to RTP Induced Overlay Errors
in a Global
Alignment Stepper
Technology
-
J.
F. Buller, M. M. Farahani, and S. Garg
-
Temperature Measurement in Rapid Thermal Processing Using
the Acoustic
Temperature
Sensor
-
Y.
J. Lee, B. T. Khuri-Yakub, and K.
Saraswat
-
Titanium Sputter Deposition at Low Pressures and Long
Throw
Distances
-
J.
N. Broughton, M. J. Brett, S. K. Dew, and G.
Este
-
Simultaneous Control of Multiple Measures of Nonuniformity
Using Site
Models and Monitor Wafer
Control
-
S.
Saxena, P. K. Mozumder, and K. J.
Taylor
- Yield Enhancement
-
Yield Enhancement Effects of Boosted Dual Word-Line (BDWL)
Scheme for
High Density
DRAM's
-
T.
Saeki, N. Kasai, T. Itani, S. Nishimoto, and Y.
Fukuzo
CORRESPONDENCE
-
Applications of the Upside-Down Normal Loss
Function
-
D.
Drain and A. M. Gough
-
Minimum Inventory Variability Schedule with Applications
in
Semiconductor
Fabrication
-
S.
Li, T. Tang, and D. W. Collins
-
Reducing the Cost Variance in Life Testing
of Integrated Circuits
-
Y.-W.
Leung
-
IEEE Copyright
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