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IEEE Transactions on
Semiconductor Manufacturing

November 1996, Volume 09, Issue 04

SPECIAL SECTION ON ISSM

Guest Editorial

P. K. Mozumder and S. Saxena

[p. 477]

SPECIAL SECTION PAPERS

Analysis of Mixed-Signal Manufacturability with Statistical Technology CAD (TCAD)

D. A. Hanson, R. J. G. Goossens, M. Redford, J. McGinty, J. K. Kibarian, and K. W. Michaels

[p. 478]

Simple and Quick Turnaround Time Fabrication Process for Deep Submicrometer CMOS Generation

H. Koike, F. Matsuoka, H. Ohtsuka, and M. Kakumu

[p. 489]

Monitoring Multistage Integrated Circuit Fabrication Processes

S. Rao, A. J. Strojwas, J. P. Lehoczky, and M. J. Schervish

[p. 495]

In-Line Defect Sampling Methodology in Yield Management: An Integrated Framework

R. K. Nurani, R. Akella, and A. J. Strojwas

[p. 506]

Rapid Failure Analysis Using Contamination-Defect-Fault (CDF) Simulation

J. Khare and W. Maly

[p. 518]

Patterning Tool Characterization by Causal Variability Decomposition

C. Yu, H.-Y. Liu, and C. J. Spanos

[p. 527]

REGULAR ISSUE PAPERS

Linear Control Rules for Production Control of Semiconductor Fabs

C. R. Glassey, J. G. Shanthikumar, and S. Seshadri

[p. 536]

Daily Scheduling for R&D Semiconductor Fabrication

D.-Y. Liao, S.-C. Chang, K.-W. Pei, and C.-M. Chang

[p. 550]

Manufacturing Cost of Active-Matrix Liquid-Crystal Displays as a Function of Plant Capacity

S. Jurichich, S. C. Wood, and K. C. Saraswat

[p. 562]

CORRESPONDENCE

An Automated Approach on Electrical Technology Characterization and Analysis

C. Perelló, M. Lozano, J. Millán, and E. Lora-Tamayo

[p. 573]

Micromasking of Plasma Etching Due to Bacteria: A Yield Detractor for ULSI

A. H. Perera and M. J. Satterfield

[p. 577]

1996 INDEX

Follows page

[p. 580]