8th Annual IEEE CPMT SCV Soft Error Rate (SER) Workshop 🗓 🗺

— tutorials, alpha upset, materials selection, process control, case studies …

register
Date: Thursday, November 3, 2016
Time: 9:30 am – 3:30 pm (Lunch will be provided)
Location: Juniper Networks, Building 6, 1215 Borregas Ave, Sunnyvale
Attendance: On-site or Remote (WebEx)
Cost: Free
Sponsors: IEEE CPMT Santa Clara Valley (SCV) Chapter, and Juniper Networks; Pure Technologies; Cisco Systems; XIA.

Our annual IEEE Soft Error Rate Workshop, now in its 8th year, focuses on alpha-induced soft errors with its unique offering of simultaneous on-site and remote participation. It provides opportunities for publication and interactive discussion on a variety of critical subjects on SER for an ever-increasing international audience.
This year’s event has a new format: We will be inviting industry experts in the field to offer three tutorials on fundamentals of alpha-related soft errors (shown in red below), to bring engineers and managers up to speed, interspersed with three presentations on current issues, solutions and case studies. Note that all times are Pacific Standard Time; please convert, for your location.
For those participating via WebEx on the Internet, we will send log-in information to all registrants on Wednesday, November 2nd.
See summaries of the contents of the tutorials and talks at this location.

Summary

Time (PST) Presenter Title
9:30 AM Check-in and Registration
10:00 AM Eric Crabill, Xilinx Tutorial: An Introduction to Single Event Effects (more)
10:45 AM Adrian Evans, iROC Tutorial: System Design Considerations for Soft Error Mitigation (more)
11:30 AM Rick Wong, Cisco Challenges of Alpha Testing (more)
12:00 Noon Lunch and Exhibits
1:00 PM Brendan McNelly, XIA; Mike Gordon, IBM Tutorial: Techniques and Challenges of Alpha Emissivity Measurements (more)
1:45 PM Laura Monroe, Los Alamos National Lab Resilience and Inexact Computing (more)
2:15 PM Francis Classe, Cypress Soft Error Upset Sensitivity to the Array Background Pattern in SLC Floating Gate and Charge Trapping Flash Memories (more)
2:45 PM Eric Crabill, Xilinx Alpha-Induced Soft Errors in Xilinx UltraScale+ Devices – Not a ‘Material’ Issue (more)
3:30 PM Close of Workshop
conferences webinars
Juniper, 1215 Borregas Ave, Sunnyvale Map