Below are summaries of each of the tutorials and talks. Return to this page following the Workshop to download PDFs of the slides.
|Eric Crabill, Xilinx||Tutorial: An Introduction to Single Event Effects (SEE)||This tutorial is a technical backgrounder on SEE in semiconductor devices, to establish a baseline understanding of origins, effects, mitigation, and testing. Key points made in this presentation are:
1. SEE have a relatively long history and can affect all semiconductor devices.
2. SEE arise from environmental radiation and present a variety of undesired behaviors.
3. SEE mitigation is possible and SEE susceptibility can be measured.
After this tutorial, attendees will have general familiarity with radiation effects in semiconductor devices. With this background, they will be primed for the other tutorials and presentations that follow during the day.
|Adrian Evans, iROC||Tutorial: System Design Considerations for Soft Error Mitigation||This talk will discuss the system level impact of soft-errors. We will look at the factors that drive system level reliability requirements including standards such as ISO-26262 as well as pragmatic factors such as customer perception and product return rates. Then a methodology for analyzing the system-level impact of soft-errors will be presented. This consists of first enumerating the system level failure modes and then listing the sources of faults at the technology level, including RAMs, flip-flops, combinatorial logic and complex IPs. Finally, using de-rating factors, it will be shown how the rate of system-level failures can be estimated and how specific design techniques can be applied to improve reliability and availability.|
|Rick Wong, Cisco||Challenges of Alpha Testing||Alpha Testing on Semiconductors present several logistic challenges.
Accelerated testing with alpha sources
• Obtaining radiation license and uniform alpha sources
• Wire bond package, air and geometry
• Component and system level testing
• Calculation of SER, package and wafer alpha emission
• Test facilities
Component and system level testing
|12:00 Noon||Lunch and Exhibits|
|Stuart Coleman, Brendan McNelly, XIA; Mike Gordon, IBM||Tutorial: Techniques and Challenges of Alpha Emissivity Measurements||In this tutorial we will discuss some techniques and the many challenges that occur when making accurate measurements of ultra-low alpha emissivity materials. Details of the operation of the XIA UltraLo-1800 detector will be given. Among other topics covered, we will discuss the sample measurement time as it relates to levels of detection, radon adsorption, detection efficiency, as well as measuring both non-metallic and irregularly shaped samples.|
|Laura Monroe, Los Alamos National Lab||Resilience and Inexact Computing||The rate of faults in hardware is expected to increase in coming years as a result of decreased feature size. We discuss inexact computing as a way of dealing with this.
Inexact computing includes the fields of probabilistic computing and approximate computing. A non-negligible rate of random faults on a device can be considered as a form of probabilistic computing. These faults introduce probabilistic error into calculations, which may be quantified and treated as a source of probabilistic variation in the calculation. Probabilistic computation is an emerging computational approach that calculates non-deterministically to attain a result that may be correct or “correct enough”. Approximate computation is a related field that produces results that are “close enough” to a correct answer, because of precision limits or numeric methods.
We will discuss overlap between the fields of resilience and inexact computing, and how developments in one may lead to insights in the other.
|Francis Classe, Cypress||Soft Error Upset Sensitivity to the Array Background Pattern in SLC Floating Gate and Charge Trapping Flash Memories||Data corruption and faults in electronics and memories due to Single Event Upset (SEU) has been studied variously by many authors, both in the terrestrial environment as well as in accelerated testing, such as from a neutron beam or a radioactive source placed in close proximity to the memory. The effect of SEU has been widely investigated on SRAMs, and neutron flux has been shown to vary strongly with altitude, on the order of several hundred times. However, data on Floating Gate and Charge Trapping flash memories is not quite as common and little attention has been paid to the impact of SEU sensitivity to the pattern programmed into the array of SLC flash memory. In this talk we will discuss the significant dependency of SEU on the pattern programmed into the device and the implications for the computation of SEU performance for a customer applications.|
|Eric Crabill, Xilinx||Alpha-Induced Soft Errors in Xilinx UltraScale+ Devices – Not a ‘Material’ Issue||Xilinx UltraScale+ Devices, fabricated with Xilinx 16nm FinFET technology, and assembled and packaged with premium ULA materials, has rendered alpha-induced soft errors immaterial. This result of applied science in product development is the result of close collaboration between component engineering and radiation effects teams.|
|3:30 PM||Close of Workshop|