Recent Progress in Memory Technology Reliability πŸ—“ πŸ—Ί

— higher performance, densities, novel materials, cell to packaging level, failure modes, underlying physics …

Speaker: Dr. Bob Gleixner, Micron Technology Inc.
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Presentation Slides: “title” (xx MB PDF) after meeting
Meeting Date: Tuesday, August 8, 2017
Time: 6:00 PM food/refreshments and networking; 6:15 PM Presentation
Cost: none

Location: Texas Instruments Building E Conference Center, 2900 Semiconductor Dr. (off Kifer Rd), Santa Clara
Reservations: sites.ieee.org/scv-eds
Summary: As they continue to pursue higher performance and densities at lower cost, semiconductor memory technologies have introduced novel materials and integration schemes from the cell to the packaging level. Understanding the reliability failure modes associated with these materials and processes is critical to providing a robust memory component. This presentation will review the major technology directions taking place in the areas of DRAM, NAND, and emerging memories. It will then review recent publications that identify the reliability concerns posed by these directions, with an emphasis on those that attempt to discern the underlying physics.


Bio: Bob Gleixner received his Ph.D. degree in materials science from Stanford University in 1998. He then joined Intel and for the next ten years worked on reliability characterization of microprocessor, microdisplay, and non-volatile memory technologies and products. Starting in 2004 Bob’s work focused on developing and productizing advanced Phase Change Memory technologies, first at Intel and later with Numonyx. He joined Micron in 2010 as part of the Numonyx acquisition, where he is now a Distinguished Member of the Technology Staff. While at Micron he’s managed teams of silicon technology and product development engineers, with his main focus on the reliability of novel non-volatile memory technologies. He has published 13 technical papers and received 5 US patents.

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