Past Meetings and Webinars

See our Meetings and Classes Prior to 2016

Heterogeneous Integration Roadmap 2-Day Symposium -- 2nd Annual, intro to HIR v1.0, overviews, integration, working groups, participation ...
from to
ical Google outlook
SEMI Hdqtrs, Milpitas
Advanced Packaging: A Perspective on 2D and 3D Architectures -- heterogeneous integration, drivers, evolution, density, options, developments needed, scaling ...
SEMI World Hdqtrs, Milpitas
System Assembly using a Microchip Printer -- chiplets, electrostatic assembly, sort, transport, roll-based, planarization, interconnect, HI ...
TI Conference Center, Santa Clara
Holistic Design in Optical Interconnects -- high-performance, bandwidths, power budget, low-cost approaches, photonics co-design ...
TI Conference Center, Santa Clara
Improving the IEEE: Issues, Ideas, Best Practices -- listening session, better methods/tools, local needs, actionable, with Division Director ...
Santa Clara Univ, Santa Clara
TSV and FOWLP Reliability Challenges: Overview -- webinar: plating, wafer thinning, backside interconnect, refinements, failure mechanisms, mitigations ...
(on the Internet)
Achieving High Reliability for Lead-Free Solder Joints: Materials Considerations -- webinar: IMCs, aging, failure modes, thermal cycling, novel alloys, combinations, selection ...
(on the Internet)
FPGA Heterogeneous Packaging Applications: Trends and Challenges -- HPC, networking, cloud services, automotive, logic/memory integration, thermal, evolution ...
TI Conference Center, Santa Clara
10th Annual IEEE EPS SCV Soft Error Rate (SER) Workshop -- alpha upset, materials selection, process control, tutorial, test facilities, case studies ...
Xilinx, San Jose
The Road Ahead: Outlook for the Electronics Packaging Industry -- projections for AI, autonomous vehicles, crypto, OSATs, foundries, outlook ...
TI Conference Center, Santa Clara
Edge Computing and Artificial Intelligence: What Electronics Packaging Engineers Need to Know -- edge computing, AI, connections, high-density packaging, challenges, opportunities ...
673 South Milpitas Blvd, Milpitas
Tour of Nvidia's Space-Age Showroom and Technology -- tour, review of Nvidia product line ...
at Nvidia, Santa Clara
Flexible Hybrid Electronics: System as Package (& Tour) -- forecasts, IoT implementation, additive processing, flex substrate, low cost, applications, plus tour ...
2244 Blach Place # 150, San Jose
Towards Energy Sustainability in Data Centers: Some Thoughts on Energy, Entropy, and Water -- powering the internet and cloud, cooling, energy use, data center design, non-traditional approaches ...
TI Conference Center, Santa Clara
IoT Energy Harvesting -- integration, power requirements, ambient energy sources, scavenging, key design issues/challenges ...
on the Internet
2D to 3D Package Architectures: Back to the Future -- scaling, heterogeneous integration, impact on power, performance, latency, nomenclature for package architectures, current metrics, projections ...
TI Conference Center, Santa Clara
Reliability for the 21st Century: Meeting Challenges of New Packaging Technologies and New Markets -- complexity, feature sizes, physics of failure, damage metrics, packaging design, qualification, proposed methodologies ...
TI Conference Center, Santa Clara
A Moore's Law for Packaging -- webinar: silicon scaling, imbalance with packaging, interconnect densities, new substrates, AI, medical applications ...
On the Internet
Heterogeneous Integration Roadmap Symposium -- end of CMOS scaling, difficult challenges, potential solutions, future vision, research, academia, labs, collaboration ...
TI Conference Center, Santa Clara
Trends and Transitions in Semiconductor Packaging -- business models, supply chain, technology requirements, forecast for 2018 and 2019 ...
TI Conference Center, Santa Clara
Multi-Die Heterogeneous Integration: Design Considerations and Technology Demonstrations -- Webinar - multi-die integration, 2.5D and 3D, Heterogeneous Interconnect Stitching Technology, monolithic-like performance ...
on the Internet
Heterogeneous Packaging Integration for Electronics Systems -- mobile products, system-on-chip, dissimilar chips, performance, cost, SiP, TSV, interposers, forecast ...
TI Conference Center, Santa Clara
How to Peel Ultra-Thin Dies from Wafer Tape -- bending stress, die strength, peel force, die structures, wafer processing steps, TSVs, pickup methods, experimental verification ...
TI Conference Center, Santa Clara
The Origins of Silicon Valley: Early Technology and EPS Pioneers -- ham radio, early angel investors, patent issues, the klystron, innovation spirit, Stanford, Bud Eldon, new IRE Group, analog, digital, autonomous vehicles ...
on the Internet
Heterogeneous Integration Roadmap Committee Meeting -- disruptive change, pace of innovation, future requirements, emerging devices and applications ...
Hilton S.F. Union Square