An IEEE Short Course in the S. F. Bay Area

Title:
"BGA TECHNOLOGIES AND DESIGN TRADEOFFS"
with Dr. Marcos Karnezos, Vice President of Technology, ChipPAC

Please Post and Circulate, through June 26, 2002

About This Short Course series
Course Overview
About the Instructor
How to Register

LOCATION:
UCSC Extension, 1180 Bordeaux Drive, Sunnyvale, near Highway 237 & Mathilda

SPONSOR:
The Institute of Electrical and Electronics Engineers: the Components, Packaging, and Manufacturing Technology Society Chapter.

COST:
IEEE Members: $225; Non-Members: $249
includes class handbook, lunch and refreshments.

INFORMATION:
Contact Dr. Bob Dubin (650) 592-0315.

OVERVIEW:
In six short years there are more BGAs than plastic packages and possibilities are still growing. This short course helps packaging and design engineers sort out some of the resulting confusion and better understand many of these BGA design choices. Several popular BGA design types are explored in depth. Details on substrates, assembly technologies, and specific advantages and disadvantages are reviewed and discussed. Tradeoffs between performance, manufacturability and cost are presented from the standpoint of choices in materials, design, and assembly process.

WHO SHOULD ATTEND:
Design and electronic packaging engineers, project and purchasing managers, process, reliability, failure analysis, and field support engineers, marketing personnel, and others who influence electronic packaging decisions in their companies.

TOPICS:

• Types of BGAs and Design Options
  • PBGAs, TBGAs, Ceramics, Cavity Up, Cavity Down, Wire Bond, Solder Bump or TAB
  *Advantages and Adaptability
  • Performance, Ball Count, Surface Mount, Customization
  *Design Tradeoffs
  • Cost, Performance, Reliability, Manufacturability, Standards
  *Matching Customer Needs
  • Getting just enough Performance, Quality, and Reliability at the Lowest Cost

ABOUT THE INSTRUCTOR:
Dr. Marcos Karnezos, Vice President of Technology at ChipPAC, has been in the electronic packaging industry for 14 years with Hewlett Packard and ASAT where he developed TBGA, PBGA, DTAB, MCMs and TE-QFP families. He has numerous publications and patents in the fields of packaging, bubble memories, lithography, and radiation window technologies.

HOW TO REGISTER:

---------------------------- REGISTRATION FORM ----------------------------
               BGA TECHNOLOGIES AND DESIGN TRADEOFFS
                     Wednesday, June 26, 2002

EMAIL your Registration Form to: myregistration@pacbell.net
---Copy to: jrtech@pacbell.net
---Include "C-6-26-02 REGISTRATION" in the Subject
---Send payment later
Or: Call Dr. Bob Dubin for more Information: (650) 592-0315

Mail Payment With A Copy Of Your Registration Form To:
J.R. Technical Associates--Attention: Short Course Registrations
PO Box 5183, Belmont, CA 94002
Make Checks and Purchase Orders payable to "IEEE-CPMT".
Credit Card Payments Accepted Only Through our website PayPal Account
--Email your Registration Form
--Go to the appropriate short course link at www.cpmt.org/scv for PayPal
Payment due by 5PM Friday before class.  CHECKS PREFERRED.

Registration for IEEE Members ($225):
Registration for Non-Members ($249):

NAME________________________ COMPANY_____________________

ADDRESS__________________________ JOB TITLE________________

CITY__________________STATE__________ZIP____________________

Phone________________ Include FAX# for Confirmation _______________

Email_______________________________________________

Manager's Name _____________________________

Payment by:
Check #_____________   P.O.________________ PayPal ___________

Amount $__________

IEEE#_________________(Required For Discount)
********************************************************** C-52301-JW ***