An IEEE Short Course in the S. F. Bay Area

Title:
"Flip Chip for Optoelectronics and MEMS"
with Dr. Elke Zakel, PacTech, Germany

Please Post and Circulate, through July 22, 2002

About This Short Course series
Course Overview
About the Instructor
How to Register

LOCATION:
Compaq Computer (HP), 10435 N. Tantau Avenue, Cupertino
see/print map.

SPONSOR:
The Institute of Electrical and Electronics Engineers: the Components, Packaging, and Manufacturing Technology Society Chapter.

COST:
IEEE Members: $85; Non-Members: $125
includes class handbook and refreshments.

INFORMATION:
Contact Ron Blankenhorn 408-588-1925 (FAX: 408-588-1927).

OVERVIEW:
Flip Chip interconnect and packaging technology has significant advantages over wire bonding, especially in applications which require high performance and high leadcount. It has also been widely used for low cost, low lead count applications for many years. Flip Chip promises to be the interconnect and packaging technology choice in the future as designs become increasingly more demanding in terms of frequency and bandwidth. For optoelectronic and MEMS, flip chip offers new opportunities and requires special technologies and materials.

In this short course you will learn various aspects of Flip Chip Technology from an active "hands-on" industry expert. The class will mcover different types of interconnect, underfill, and wafer bumping methods as well as assembly equipment and reliability considerations. Also covered are cost, quality and reliability considerations. The technical material presented in this class will improve your overall understanding of Flip Chip Technology and help you develop and achieve realistic Flip Chip design and manufacturing goals in your work.

WHO SHOULD ATTEND:
Packaging engineers, managers, design engineers, quality and reliability personnel involved in research, developement, design, and manufacaturing. Others involved in the design, development, and manufacturing of devices incorporating Flip Chip technologies.

TOPICS:

• Flip Chip applications and markets
• Bumping techniques for Flip Chip assembly (including Au, AuSn, NiAu, PbSn leadfree and stud bumping)
• Fluxless flip chip attach using AuSn metallurgy
• Flip Chip adhesive interconnect technology (including conductive adhesives and direct chip attach)
• Laser soldering in optoelectronic packages
• Quality and reliability issues (including known–good– die, underfill technologies)
• Low cost alternatives
• Flip Chip assembly equipment considerations
• Flip Chip vs. Chip Scale Packaging: tradeoffs and other important considerations
• Future trends, developments and markets
• Summary and discussion

ABOUT THE INSTRUCTOR:
Dr. Elke Zakel is recognized as one of the leading authorities on flip chip technologies and has lectured and presented papers on this subject throughout Europe and the USA. She has worked extensively on the development of new chip interconnection technologies as well as the qualification of these techniques for industrial applications and is the author of numerous publications concerned with bonding techniques and reliability of flip chip, wire bond and TAB interconnections. Dr. Zakel holds M.S. and Ph.D. degrees in Materials Science from the Technical University of Berlin and is General Manager at PacTech where she is responsible for equipment, process, and package development of such technologies as electroless nickel bumping, laser bonding, and Chip Scale Packaging. She is the chair of the Area Array Packaging Workshop Europe and of the Smart Cards Workshop. She is chairperson of the German CPMT-Chapter.

HOW TO REGISTER:

For credit card payment, please use our secure PayPal account:

Registration for IEEE Members ($85):
Registration for Non-Members ($125):

---------------------------- REGISTRATION FORM ----------------------------
               "Flip Chip for Optoelectronics and MEMS"
                       Monday, July 22, 2002
Mail or Phone pre-registration to: Ron Blankenhorn

Mail to: Ron Blankenhorn; 328 Martin Avenue; Santa Clara, CA 95050
	FAX to: 408-588-1927

Make Checks payable to "IEEE-CPMT".
Credit Card Payments accepted only through PayPal (above)
Payment due by 5PM Wednesday before class. 

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