An IEEE Short Course in the S. F. Bay Area

Title:
"CHALLENGES FOR HDI-MICROVIAS -- ENGINEERING, DESIGN, FABRICATION AND ASSEMBLY"
with Happy Holden

Please Post and Circulate, through April 25, 2001

About This Short Course series
Course Overview
About the Instructor
How to Register

LOCATION:
UCSC Extension, 1180 Bordeaux Drive, Sunnyvale, near Highway 237 & Mathilda
Print out the map to the UCSC site.

SPONSOR:
The Institute of Electrical and Electronics Engineers: the Components, Packaging, and Manufacturing Technology Society Chapter.

COST:
IEEE Members: $225; Non-Members: $249
includes class handbook, lunch and refreshments.

INFORMATION:
Contact Dr. Bob Dubin (650) 592-0315 or Dr. John Newman (408) 978-1069 (FAX# 408-978-1069)

OVERVIEW:
As ball grid arrays, and tape carrier, flip chip and chip scale packages all come into common use, the need for advanced printed wiring boards (PWBs) is essential --both as the board and as the package. This short course looks at basic technologies for ASIC packaging, portable products, high performance computing, telecom, and dense multi-chip modules. PWB wiring modeling, design rules, materials, and selection of microvia structures and assembly processes will be examined and compared. The program will define how to select breakout patterns, circuit routing guidelines, manufacturing process features and materials required to permit the use of widely accepted fine pitch and BGA components. Participants are encouraged to bring along their technical questions for discussion.

WHO SHOULD ATTEND:
Design and packaging engineers, field support personnel, marketing personnel, design, process, failure analysis, and reliability engineers, printed wiring board designers, others.

TOPICS:
• Introduction to Advanced Printed Wiring Boards (PWBs) and Microvias (HDIs)
  • Benefits of High Density Interconnect (HDI), Micro Packaging Density Requirements, Applications of HDI
• Fabrication Challenges and Build-Up Multilayer (BUM) Technologies
  • Introduction to Build-Up Multilayer Technology Processes, Technical Details, Cost Expectations
• Engineering Challenges and Modeling
  • HDI Material Selection, New IPC HDI Material Specs, Electrical Performance, Simplifying Multilayers
• Design Challenges and Layout
  • Selecting the Proper Design Rules, Wiring Analysis, Designing Blind and Buried Vias
• Assembly Challenges and Specification
  • Panelization for Assembly, Requirements for Mixed Assembly, Component Spacing Orientation
• Volumes 1 and 2 (color-illustrated), will be available at no extra charge to attendees as supplies last.

ABOUT THE INSTRUCTOR:
Happy Holden is Manager of Advanced Technologies for Westwood Associates. He is responsible for next-generation Printed Circuit Manufacturing Technologies, Advanced Design Tools and Design Consulting. Prior to joining Westwood, he was a consultant with TechLead Corporation, and had been at Hewlett-Packard for over 27 years. Mr. Holden formerly managed Hewlett-Packard's Taiwan-based application organization, and printed circuits R&D. He is a frequent speaker on Printed Circuit topics and Packaging Strategies and has had over 60 technical papers published on automation, printed circuits, advanced packaging, DFM and process engineering.

HOW TO REGISTER:

         FEES:      IEEE Members:         $225  
                    other attendees:      $249
       (Includes class handbook, lunch, and refreshments)
  Checks or P.O.s should be made payable to "IEEE/CPMT"
  and sent with the completed registration form below to:
                    J. R. Technical Associates 
                    PO Box 5183
                    Belmont, CA 94002
                      or FAX to: (408) 978-1069
Limited Seating.  Register BY FAX or EMAIL NOW to reserve your seat!
Your registration will be CONFIRMED when payment is received.

--------------------------------------------------------------------------
                         REGISTRATION FORM
                 CHALLENGES FOR HDI-MICROVIAS --
            ENGINEERING, DESIGN, FABRICATION AND ASSEMBLY
              Wednesday, April 25, 2001, Noon - 5 PM

Mail, Phone, or FAX pre-registration to: J. R. Technical Associates
Mail to: J.R. Technical Associates  PO Box 5183, Belmont, CA 94002
    Or: Ph./FAX to: (408) 978-1069
    Or: EMAIL your Registration Form to: myregistration@pacbell.net
          ---Copy to: jrtech@pacbell.net
          ---Include "C-4-25-01 REGISTRATION" in the Subject.
    Make Checks and Purchase Orders payable to "IEEE-CPMT".
    CHECKS PREFERRED.
    Sorry, we cannot accept credit card payments of any kind.


IEEE #__________________ (if applicable)

NAME_____________________________________  COMPANY_________________________

ADDRESS____________________________________________________________________

CITY______________________________________STATE_______________ZIP__________

email___________________________    Include your FAX# for confirmation. 

Phone___________________________    FAX_______________________________

    Payment by:  Check #________      Purchase Order #________________

    If paying by P.O.: Manager's Name___________________ Amount $_________  

To Pre-register:  Phone us, or fill out this registration form and 
                  fax it to 408-978-1069.                 C-4-25-01 

              If you can't attend, what about a Team Member?