Title:   "Polymers & nano-Composites for Electronic and Photonic Packaging: Recent Advances in Materials and Processes"
with Prof. C.P. Wong, Georgia Institute of Technology

Please Post and Circulate, through Oct. 1, 2007

LOCATION:
Holiday Inn San Jose
1740 North First Street, San Jose

SPONSOR:
The Institute of Electrical and Electronics Engineers: the Components, Packaging, and Manufacturing Technology Society Chapter.

COST:
IEEE Members: $300 for half-day Course; $450 for full day (2 Courses)
Non-Members: $350 for half-day Course, $500 for full day (2 Courses)
See descriptions of all 7 Courses in the Advance Program.
REGISTER at our on-line registration site, or use the printed Symposium Advance Program form.

OVERVIEW:
Polymers are widely used in electronics packaging as adhesives, encapsulants, insulators, dielectrics, molding compounds and conducting elements for interconnects. These materials also play a critical role in the recent advances of low-cost, high performance novel No Flow Underfills, Reworkable Underfills for Ball Grid Array (BGA), Chip Scale Packaging (CSP), System on a Package (SOP), Direct Chip Attach (DCA), Flip-Chip (FC), Paper-thin ICs and 3D Packaging, Conductive Adhesives (both ICA and ACA), Embedded Passives (high-k polymer composites), nano particles and nano-functional materials. It is imperative that materials suppliers, formulators and their users have a thorough understanding of polymeric materials and the recent advances in nano materials and their importance in advancements within the electronics packaging and interconnect technologies.

Course Outline:

• Overview of semiconductor packaging technology
• The next generation of electronics packaging
• Novel no flow and reworkable underfills for flip-chip applications
• Fundamentals and recent advances in conductive adhesives and nano lead-free Alloys for lead-free Interconnects
• Conductive adhesives and nano-lead-free alloys for lead-free interconnects: fundamentals and recent advances
• Low-cost high-performance embedded passives materials and processes
• Recent advances in nano particles and nano-functional Materials

Intended Audience
Engineers, scientists and managers involved in the design, process and manufacturing of IC electronic components and hybrid packaging; electronic materials suppliers involved in materials manufacturing and research & development.

ABOUT THE INSTRUCTOR:
Dr. C.P. Wong is a Regents’ Professor and the Charles Smithgall Institute Endowed Chair (one of the two Institute endowed chairs at Georgia Tech). His research interests lie in the area of polymeric materials (organic and inorganic), and nano functionalized materials, in particular, low-cost, high-performance materials and manufacturing processes. Prior in joining Georgia Tech in 1996, he was with AT&T Bell Laboratories for 19 years and was elected as an AT&T Bell Labs Fellow in 1992. He holds over 45 U.S. patents, numerous international patents, and has published over 500 technical papers and 450 presentations in packaging related areas. Dr. Wong received the B.S. degree in chemistry from Purdue University, the Ph.D. degree in chemistry from Penn State University, and was a Postdoctoral Fellow at Stanford University.

He has received many Awards from the IEEE, IMAPS, AT&T Bell Labs, and Georgia Tech: The IEEE CPMT Society Sustained Technical contributions award in 1995, the IEEE EBA Award in Continuing Education in 2001, the CPMT Exceptional Contributions Award in 2002, the Georgia Tech Distinguished Professor Award in 2004, named holder of the Charles Smithgall Institute Chair in 2005 and the IEEE Components, Packaging and Manufacturing Technology award in 2006. He serves on six Editorial Boards of the IEEE Trans. on Components and Packaging Technologies, International Opto-electronics, Journal of Adhesion Science & Technology, the Journal of Nano-composites, Chip Scale Review and the John-Wiley Encyclopedia on Smart Materials. He is a fellow of the IEEE and is a member of the National Academy of Engineering of the USA.