Please Post and Circulate, through February 23, 2000
About This Short Course series
Course Overview
About the Instructor
How to Register
LOCATION:
UC Extension, 1180 Bordeaux Drive, Sunnyvale,
near Highway 237 & Mathilda
SPONSOR:
The Institute of Electrical and Electronics Engineers:
the
Components, Packaging, and Manufacturing Technology
Society Chapter.
COST:
IEEE Members: $225; Non-Members: $235
includes class handbook, lunch and refreshments.
INFORMATION:
Contact
Dr. Bob Dubin (650) 592-0315 or
Dr. John Newman (408) 978-1069
(FAX# 408-978-1069)
OVERVIEW:
A straightforward text and graphics format is used to introduce modern and advanced packages, packaging design issues, and basic processing concepts. Key design and performance aspects of QFP, BGA, Flip Chip, and Small Form-factor package technologies are explored. Application issues are reviewed to help you learn how to choose the right package.
WHO SHOULD ATTEND:
ASIC designers, Field Support, Marketing, Design Engineers, and others needing an introduction to modern semiconductor packages and packaging technologies, and others who evaluate present packages and influence future
electronic packaging decisions in their companies.
TOPICS:
ABOUT THE INSTRUCTORS:
Dr. John Newman and Dr. Robert Dubin are partners and founders of J. R. Technical Associates which specializes in customized technical education and training for the workplace. Both are experienced "hands-on" contributors and active consultants to Silicon Valley industries.
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Revised
31 January 2000