COST:
IEEE Members: $75; Non-Members: $110
(after April 4: Member $95, Non-Member $125)
includes class handbook, refreshments, and free admission to the WESCON exhibits.

OVERVIEW:
With the advent of RFID chips in the commercial sphere, many companies and individuals are taking an interest in this emerging market. Major retail outlets as well as government use of RFID devices are spurring a great deal of speculation about the future of the technology. Because of the small size and extreme cost constraints, packaging of these unique devices is a major technological challenge. This seminar will bring together leading experts in the field to discuss manufacturing, infrastructure, packaging and cost reduction efforts in the industry. The seminar also addresses packaging trends for RF subsystems and systems, with a focus on the latest in System-in-Package technology. (see also the "SoP/SiP/SOC" Seminar on May 4.)

INFORMATION, OR TO PRE-REGISTER:
Contact Farhad Akhavan, (408) 546-5872.

WHO SHOULD ATTEND:
Packaging engineers, system engineers, thermal and mechanical engineers, PCB layout engineers, field support personnel, marketing personnel, design, process, failure analysis, and reliability engineers.

For credit card payment, please use our secure PayPal account:

Registration for IEEE Members ($95):
Registration for Non-Members ($125):

Introduction and Overview - Seminar Chairman

Les Besser - Besser Associates "Overview of RFID Technology and Deployment"

Rod Petrianos - Escort Memory Systems "Packaging for RFID Antennas, Controllers, and Network Interface Modules"

Steve Smith - Alien Technology "Packaging Technology for UHF RFID Tags"

Prof. Vivek Subramanian, UC-Berkeley - "Prospects for all-printed RFID: Technology, Opportunities, and Challenges"

As RFID technology has become more ubiquitous in the consumer marketplace, opportunities for ultra-low-cost tags as replacements for the ubiquitous UPC barcode have emerged. Silicon-based solutions are steadily driving towards this goal; however, issues related to cost and metal/liquid interactions pose some potential roadblocks in this regard. Printed electronics provides a promising potential pathway towards the realization of sub 1-cent RFID tags for item-level tracking of consumer goods, running at lower frequencies that are more compatible with liquids, etc. Such tags may enable the realization of automated querying systems for inventory control, supermarket checkout, and back-end store automation. In this talk, I will discuss our progress developing materials, processes and devices for the realization of ultra-low-cost printed RFID tags, and will discuss the implementation and deployment issues regarding the same. Using a library of novel materials, including metallic and metal-oxide nanoparticles and a variety of novel organic semiconductors and dielectrics, we have demonstrated high-performance multilayer interconnects, high-Q passive components, and printed NMOS and PMOS transistors with mobilities >10-1cm2/V-s; these represent the highest performance all-printed devices reported to date. AC performance of these devices is more than adequate for 135kHz RFID, and, with further optimization, 13.56MHz RFID appears to be within reach. Based on these results, I will discuss the outlook for printed RFID in terms of its advantages, disadvantages, and standardization issues.

Telesphor Kamgaing, Intel Corporation - "Design of Small Form Factor RF packaging for Wireless Communication Systems"

Functionality integration, form factor reduction and cost minimization are major drivers for modern RF communication systems. In order to improve portability and extend the battery lifetime of wireless communication systems such as cellular phones and PDA’s, some RF packaging components that have traditionally been mounted as discrete parts on PCBs have to be integrated on small form factor package substrates such as silicon, gallium arsenide, low-temperature co-fired ceramic (LTCC) or multilayer organic substrates. While each of these substrate technologies provides significant performance advantages, none of them has been proven to provide a fully satisfactory solution. As such, the industry and research community continue to be divided about whether future RF systems should be realized as system-in-package (SiP) or system-on-chip (SOC). In this presentation, we will discuss the main differences between system-in-package and system-on-chip for wireless applications. Using practical examples we will present some recent progress as well as current challenges in realizing small RF packaging components and building blocks in representative substrate technologies. We will also present a complete SiP solution for cellular applications and discuss some emerging solutions for noise isolation in RF and analog mixed-signal systems.

Norm Owens - Freescale Semiconductor- "RF/Microwave Packaging Technology at Freescale Semiconductor"

RF IC packaging must take into account the fundamental differences between digital and analog signals. Within the traditional semiconductor package portfolio there are three types of packages which have seen the most interest for RF packaging in the hand-held device market segment. These are the quad flatpack no-lead (QFN), ball grid array (BGA), and land grid array (LGA). The advantages and disadvantages of each are considered. In addition, process and materials considerations including green materials, higher temperature reflow, integral shield, higher frequencies, greater functional integration, the need for thinner packages, supply chain management, and wafer level packages are discussed. Successful packaging applications should closely consider the customer requirements and available technology portfolio of the semiconductor supplier.