Please Post and Circulate, through December 12th.
About This Short Course series
Course Overview
About the Instructor
How to Register
LOCATION:
UC Extension, 1180 Bordeaux Drive, Sunnyvale,
near Highway 237 & Mathilda
Print out
the map to the UCSC site.
SPONSOR:
The Institute of Electrical and Electronics Engineers:
the
Components, Packaging, and Manufacturing Technology
Society Chapter.
COST:
IEEE Members: $225; Non-Members: $249
includes class handbook, lunch and refreshments.
INFORMATION:
Contact
Dr. Bob Dubin (650) 592-0315 or
Dr. John Newman (408) 978-1069
(FAX# 408-978-1069)
OVERVIEW:
This short course provides an overview of three fundamental
aspects of semiconductor manufacturing technology -- Fab, Packaging, and
Test. These basic semiconductor manufacturing steps and their attributes
are described and discussed. In addition, information on scheduling,
cycletime, design, yield factors, and inventory is provided. Cost elements
are given for both manufacturing and products. Semiconductor
manufacturing's unique characteristics will be explained, and major inputs
and organizational structures will be presented.
This class provides a unique technical and organizational perspective to both those working in and those interfacing with semiconductor manufacturing operations. The course material is mostly qualitative and can be easily understood by students having technical and non-technical backgrounds.
WHO SHOULD ATTEND:
Packaging and test engineers, quality and reliability engineers, managers, investors,
marketing and sales personnel.
TOPICS:
ABOUT THE INSTRUCTOR:
Jerry Secrest holds a B.A. degree from San Jose State University and is the principal technical consultant at Secrest Research. He provides technical consulting to semiconductor manufacturers in the areas of manufacturing equipment communications, product parameter prediction screening, and die trace systems. In his 35+ years of experience he has held various engineering and operations management positions in IC manufacturing at Fairchild Semiconductor. He is active in developing new SEMI automation standards and sits on the MEPTEC board.
FEES: IEEE Members: $225
other attendees: $249
Checks or P.O.s should be made payable to "IEEE/CPMT"
and sent with this registration form to:
J. R. Technical Assoc.
PO Box 5183
Belmont, CA 94002
or FAX to: (408) 978-1069
Limited Seating. Register NOW to reserve your seat! Your registration
will be CONFIRMED when payment is received. Payment due by 5 PM the
Friday before class. Use our easy PayPal option, for credit cards,
or mail in your registration (CHECKS PREFERRED).
For credit card payment, please use our secure PayPal account:
Checks and Purchase Orders should be made out payable to "IEEE-CPMT".
Mail to J.R. Technical Associates PO Box 5183, Belmont, CA 94002.
Payment due by 5PM Friday before class. CHECKS PREFERRED.
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REGISTRATION FORM
PRINCIPLES OF SEMICONDUCTOR MANUFACTURING
Wednesday, December 12, 2001, Noon - 5 PM
Mail, Phone, or FAX pre-registration to: J. R. Technical Associates
Mail to: J.R. Technical Associates PO Box 5183, Belmont, CA 94002
Or: Ph./FAX to: (408) 978-1069
Or: EMAIL your Registration Form to: myregistration@pacbell.net
--Copy to: jrtech@pacbell.net
IEEE #__________________ (required for discount)
NAME_____________________________________ COMPANY_________________________
ADDRESS____________________________________________________________________
CITY______________________________________STATE_______________ZIP__________
email___________________________ Include your FAX# for confirmation.
Phone___________________________ FAX_______________________________
Manager's Name___________________
Payment by: Check #________ Amount $_________ Purchase Order #____________
To Pre-register: Phone us, or fill out the form and fax it. C-121201-JW
Include your FAX number, for confirmation.
If you can't attend, what about a Team Member?
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