IEEE/CPMT Dinner Meeting:
"No-Lead Solder -- Two Somewhat Different Views" --
Wednesday, March 14, 2001
Vern Soberg and Joe Fjelstad
Seated dinner served at 6:30
($20 if reserved before March 11); $25 after & at door;
Presentation (no cost) at 7:30.
Ramada Inn1217 Wildwood Ave (Fwy 101 frontage road, between Lawrence Expressway and Great America Parkway), Sunnyvale, (800) 888-3899 -- see map.
PLEASE RESERVE IN ADVANCE --
For dinner and/or meeting: by email to
or call our CPMT hotline at 1-650-299-8898.
Please reserve for "presentation-only", even if not attending the dinner.
The general topic, 'No-Lead in Solder", is stirring a great deal of interest and controversy in electronic manufacturing circles. But the cost impacts of banning lead in solder will be felt far beyond electronic manufacturing, by the entire electronics industry. Also there are reliability issues raised by replacing the old tin-lead solder standard with new alternative alloys.
Nevertheless, some say that the transition is "inevitable". Of course, they are thinking of DDT, PCBs, asbestos, MTBE, and FREON, banned because of the danger to humans and other creatures, and to our environment. Is lead in solder such a danger, justifying the very major trauma that a ban would entail?
Our two speakers, recently associates at Tessera, will shed light on this urgent question, from different points of view. Following are their abstracts and bios.
- Vern Solberg: Lead-Free Solder for CSP -- The Impact of Higher-Temperature SMT Assembly Processing
- Many of the electronic products being developed using miniature chip-scale package are moving toward lead-free, environmentally safe assembly processes. Key factors that an engineer should evaluate when adapting the lead-free solder materials for CSP include the physical features and construction of the devices, suitability of the substrate materials for PC board fabrication and a general understanding attachment methodology. IC manufacturers and users of chip-scale devices should also consider the base materials selected for circuit board fabrication, surface finish, and assembly process compatibility. This presentation will review IC package variations, land pattern design guidelines, explore alternative solder alloy compositions, furnish recommendations for solder process development and present data comparing environmental testing of eutectic solder to lead-free solder attachment of chip-scale BGA devices.
- Joe Fjelstad: A Holistic View of No-Lead in Electronic Solder
(The speaker's set of Powerpoint slides -- 250 kB).
- The push to manufacture electronic assemblies using lead-free solders has been in full swing for the last few years. Numerous seminars, conferences and even books have been written about the subject. The engine driving this is variously purported to be consumer demand, legislative requirement or simple desire to provide environmentally friendlier products. Many well meaning individuals and companies have jumped on this bandwagon earnestly wanting to appear responsive to the needs of both the consumer and the environment. However, a number of thoughtful scientists and engineers around the world are beginning to call to question this effort. Their reports and assessments are not coming back with the kind of results that were initially expected. It is becoming clearer that the blind drive to remove lead from electronic solders is leaving in its wake a host of environmentally negative results. This presentation will compare and contrasts lead-free solders with traditional lead based solders in a number of important areas, including the original concern and driver for the movement, human toxicity. These are broken down into three broad areas of interest:
- technical issues related to reliability, materials and processes;
- business issues which embrace matters of industry readiness and cost; and
- environmental issues which include matters of recyclability, energy conservation and toxicity to various living things.
- Speaker Biographies
- Vern Solberg is a consulting engineer and educator with more than thirty years experience in PC board design for SMT and manufacturing process development. Serving for five years as an applications engineer with Tessera supporting mBGA package development, Vern continues to support the company as a Sr. Applications Engineer and advisor in assembly process refinement, solder attachment engineering and standards. A working member of IPC and JEDEC, he also serves as a US delegate to IEC for standards related to components, PC board design and SMT assembly.
- Joseph Fjelstad is a senior consultant with Pacific Consultants, LLC in Mountain View, CA. He has been involved in the manufacture of electronic interconnection products for more than 28 years and has written extensively on various aspects of the subject. He has more than 36 US and 30 international patents in the field.
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please be advised that I would greatly prefer the Email route.
13 March 2001