IEEE/CPMT Dinner Meeting:
Optical Packaging: Opportunities for the Future --
Wednesday, June 13, 2001
Thomas S. Tarter,
Senior Thermal Engineer
Lightwave Microsystems Corporation
Seated dinner served at 6:30
($20 if reserved before June 10); $25 after & at door;
Presentation (no cost) at 7:30.
Ramada Inn1217 Wildwood Ave (Fwy 101 frontage road, between Lawrence Expressway and Great America Parkway), Sunnyvale, (800) 888-3899 -- see map.
PLEASE RESERVE IN ADVANCE --
For dinner and/or meeting: by email to
or call our CPMT hotline at 1-650-299-8898.
Please reserve for "presentation-only", even if not attending the dinner.
This talk centers around packaging opportunities for professionals in
microelectronic, disk drive, and system packaging. These opportunities are
emerging in the form of mechanical, electrical, thermal, and structural
engineering disciplines and provide a chance for those of us in the
microelectronic world to take part in this new and exploding area of
packaging. Challenges in this area include mechanical and structural,
electronic, temeprature control and heat transfer, materials science,
control systems and of course, optical engineering.
Due to the fact that this industry is new, best practices and
standardization of form factors, materials, and interconnections are still
emerging. This need provides an excellent motivation to look into how
traditional methods of packaging and automation can be applied both in the
packging and system level engineering areas. The need for standardization
is dire, and with this need comes the requirement that the industry starts
talking on a practical level about how we can focus on simple standards that
will help drive down the cost of production as well as simple and reliable
application at the end user.
The transition from microelectronics to optoelectronics is also discussed
from the author's point of view, having gone through it on a first-hand
Overall, the speaker will try to generate interest in this new and exciting
field to further advance the state-of-the-art in advanced packaging.
- Speaker Biography:
- Tom Tarter has worked in the Silicon Valley for nearly 20 years in the area
of packaging. He spent 17 years at Advanced Micro Devices as a packaging
and performance characterization specialist, performing thermal and
electrical modeling and measurement for AMD products. Over this time he has
written and published over 30 white papers and articles on thermal and
electrical phenomenon, standards, and applications for microelectronic and
optoelectronic packaging. He has also presented several short courses and
invited papers at conferences and events worldwide. Tom has been active in
community, national, and international standards development. He has been
involved in the JEDEC JC15 Committee on Thermal and Electrical Phenomenon in
Microelectronic Packaging since its inception and has served as the Chairman
for the JC15.1 thermal subcommittee for five years, and as general chairman
for the JC15 thermal and electrical groups for the last two years. He is
currently the secretary for the Silicon Valley Chapter of the IEEE/CPMT and
works closely with the staff to organize meetings, talks, symposiums and
conferences. Tom is also on the executive committee of the IEEE Semi-Therm
conference on thermal phenomenon, and serves as a consulting member on
optoelectronic packaging. His current endeavor is in the analysis, control,
and application of thermal sciences to optoelectronic packaging at Lightwave
Microsystems in San Jose, California. Tom is a member of IEEE, CPMT, SPIE,
If you are not on our Chapter's regular email or FAX distribution list
for meeting anouncements, you can easily be added!
Please send an Email to
and let me know if you'd like email or FAX distribution.
If you don't have Email, then please reply to 800 686-9366 (CPMT's 800 number), but
please be advised that I would greatly prefer the Email route.
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