Components, Packaging & Manufacturing Technology Society

IEEE/CPMT Dinner Meeting:

Innovative Connectors and Sockets --
  • "Microspring™ Contacts: A Proven Interconnect Element Enabling New Cost-Effective Solutions", John Novitsky, VP Business Development, FormFactor

  • "Probes for Chips, Wafers, Packages, and PCBs, & High-Density Sockets for Test and Burn-In", Gabe Cherian, Cherian Enterprises
  • Wednesday, October 17, 2001
  • FREE dinner served at 5:15 -- SPECIAL TIME! (pizza and drinks, all FREE; vegetarian available)
  • Presentation (no cost) at 6:00 (finishing by 8:00).

    San Jose Convention Center (see map). Plan to attend WESCON that afternoon (free admission), then stop by our meeting for dinner and the talks.


  • For dinner and/or meeting: by email to Tom Tarter
  • or call our CPMT hotline at 1-650-299-8898.
  • Please reserve for "presentation-only", even if not attending the pizza dinner.

    On Wednesday October 17 at 6 PM, the Santa Clara Valley section of the Components, Packaging, and Manufacturing Technology Society will present a special program at the San Jose Convention Center, Room B4 on the exhibit level in conjunction with the WESCON Exposition and Conference.
    The venue and times will change for this special event from the usual Ramada Sunnyvale location. For those who come at 5:15, there will be free pizza, soft drinks, and socializing, courtesy of WESCON. WESCON/2001 Exhibit hours that day are 10 AM to 5 PM. The Conference hours are 9 AM to 5 PM and include many papers related to electronic packaging, manufacturing, and test. Here are several of high interest in packaging:

  • Wednesday, 2:00 pm - 5:00 pm: 3D and System-in-Package Technologies (3 Hrs.) (short course - fee)
  • Other Short Courses: "Electronic Interconnection Technologies" and "High-Density Substrates with Microvia Technology" Monday, "High-Performance Backplane Interconnects", "Ultrasmall and Chip-Scale IC Packaging Technologies", and "Thermal Aspects of Electronics Cooling" Tuesday, "High-Speed Interconnects for Fiber Optic Microwave Components" Wednesday
  • Wednesday all day: visit the exhibits (free)
  • Check the details!

    First Talk:
    Several IC and board trends continue to drive socket and connector technology:
  • I-O counts are increasing
  • Board and package pitch are decreasing
  • Pin speeds are increasing
  • Cost reductions are mandatory
    Some of these trends run in opposition to each other, making the job of interconnect designer very challenging.
    An interconnect element, called the MicroSpring™ contact, was invented and has several properties which can be exploited to simultaneously solve interconnect problems. The MicroSpring contact is:
  • Compliant
  • Resilient
  • A low-force wiping contact, as well as a solderable permanent interconnect
  • Fine-pitch, and scalable
  • Durable and reliable
  • Electrically tune-able
  • Inherently low-cost
  • Proven in the high performance probe card market
    Designers using MicroSpring contacts typically integrate simultaneously (often in a non-traditional manner) the issues of test and burn-in, of assembly, of board or package pitch, and come up with a new solution that usually lowers overall costs and improves overall reliability. In this presentation, we will describe applications of MicroSpring contacts at test, and in 1st, 2nd and 3rd level interconnect, and show examples of how clever out of the box thinking can result in dramatic improvements in cost, reliability, and so on. We will also describe the status and near terms plans of the manufacturing lines of MicroSpring contacts at Shinko and at Tyco.

    Second Talk:
    "The SQUEEZE Is On! Designing Sockets for Next-Generation IC Packages". Ron Iscoff, Editor of "Chip Scale Review", chose this title for his article on CSP Sockets in the April 2001 issue of the magazine. Ron then summarized the gist of the article by saying "Shrinking IC packages, with their increasingly tighter pitches, make CSP socket design a complex task, demanding a unit that works reliably up to a million times". We couldn't have said it any better.
    The High-Density sockets that Gabe Cherian has designed and is developing address this exact issue. They could have been called "CSP sockets", as well. These sockets are designed based on a technology that can be extended to "Probes" and other similar interconnection devices. He calls it "Parallel Nesting" of springs, together with the use of "Combs", to create and control wipe and/or scrub.
    In this presentation, He will explain the underlying technology and how it has been applied to create High-Density sockets and probes. The sockets can be used for test and burn-in due to their ruggedness. They can also be used for production due to their low cost. Several versions of probes will also be shown, including some that can test more than one chip at a time.
    Furthermore, the sockets and the probes, together with their combs, are designed to counteract the effect of TCE mismatch during thermal cycling. And he will also show how the technology can be applied to other innovative concepts, such as those developed by "FormFactor".

    Speaker Biographies
    John Novitsky, VP Business Development, FormFactor, has been with FormFactor for over 3 years. Before that, he was with MicroModule Systems, where he worked on HyperSPARC, 486, Pentium and Pentium Pro multi-chip modules. Mr. Novitsky was with Intel Corp for eleven years, working on the 386, 486 and Pentium processor projects. He has a BS CS from Michigan State University, where he was an Evans Scholar. He is a member of IEEE and IMAPS. He continues to be a microprocessor nerd, serving on the editorial board of Microprocessor Report.

    Gabe Cherian is an engineer who has worked for over 25 years with connectors, interconnection devices and electronic components. He has 21 basic patents, 13 of them are on such products. He worked 7 years with AMP Incorporated, Harrisburg, PA and 17 years with Raychem Corporation, Menlo Park, CA. Interestingly enough, TYCO International acquired both companies in 1999. A couple of years ago, Gabe started to develop, on his own, under the name of "Cherian Enterprises", some new products for the electronics industry. Now he has two product families ready for the market. They are based on a technology platform where springs and needles are arranged in a certain fashion, working in conjunction with "combs". They can then be used as High-Density Sockets, Probes and the like. Gabe will tell us about these products.
    Gabe served as Chairman of the Santa Clara Valley CPMT Chapter, for 3 years, from 1982 through 1985. He then served as Secretary & Treasurer for a couple more years. He then served as Program Chairman for the five following years, when he organized plant tours, seminars and courses, such as the "Electronics for Non-Electronic Professionals". Another program was the "Electronic Manufacturing Technology" series. This covered all the complete processes needed to make a computer or an equivalent electronic system, starting from the Silicon base material, all the way up to the finished product. Gabe was on the Advisory Board of Directors of the CPMT Chapter for thirteen consecutive years.
    Gabe served also as the Education Chairman for the Santa Clara Valley Section of the IEEE. He was Co-Chairman of the Tutorial Committee of WESCON 1987 in San Francisco. At one time, Gabe was on a "JEDEC" committee and on a SEMI Packaging Task Force.

  • If you are not on our Chapter's regular email distribution list for meeting anouncements, you can easily be added! Please send an Email to Paul Wesling and let me know if you'd like email or FAX distribution. If you don't have Email, then please reply to 800 686-9366 (CPMT's 800 number), but please be advised that I would greatly prefer the Email route.

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