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"Embedded Passives"
The trend in digital circuit design is for higher speeds. For example, high speed chip-to-chip and board-to-board interconnects are being designed for data rates in excess of 12.5 Gb/s. At these speeds surface mount discrete passive components can approach or exceed their limits of operation and current design practices must adopt new techniques to enable future high-speed digital systems. Printed circuit boards with embedded passive components, (resistors, capacitors and inductors) offer many advantages to application design and circuit functionality. These advantages include improved signal integrity, increased functionality, reduced system cost and higher reliability.
This talk discusses the impedance characteristics of printed circuit board embedded resistors and capacitors. Consideration is given to the effects on impedance for a given geometric design. S-parameters are extracted in the frequency range from 0.1 to 20 GHz. Where possible we attempt to compare circuit designs using 0603 and 0402 surface mount resistors and capacitors to equivalent circuits with embedded resistors and capacitors. Modeling parameters are derived and compared to measurement results. From collected data and modeling results we show how embedded passives may be designed in to optimize circuit speed, bandwidth and signal integrity.
A robust embedded passive process requires a repeatability that can maintain nominal resistor and capacitor values and at the same time maintain the tolerance required by the circuit application. Also in high speed design any change to a passives geometry by trimming to tolerance may have a negative effect on the high frequency impedance response. We will discuss methods of trimming resistors (planar vs. slice cut) and compare the effects.
We summarize and conclude with the ABC's of embedded passive enablement:
A. Embedded passive part characterization - S-parameters are characterized for a given part shape and type.
B. Design implementation - an overview of current design tools for embedded passive designs.
C. Design for Manufacturability - overviews high yield, high reliability and cost effective embedded technologies.
Dr. Nicholas Biunno is a Principal Scientist for the PCB Division of Sanmina-SCI. He received a Ph.D. in Materials Science and Engineering from North Carolina State University in 1989. He has worked at ALCOA Electronic Packaging Corporation in new product development (flip chip assembly and failure analysis) prior to joining Zycon Corporation. He has been with Zycon, now Sanmina-SCI Corporation, for more then 11 years. In that time he has worked on various projects including integrative passives and failure analysis of solder joint surface finishes. Nicholas has authored 30 publications and 3 US patent in electronic materials processing and characterization. He is a member of CPMT's Technical Committee on Discrete and Integral Passives.
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