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"Volume Production of Ultra-Thin Chips"
-- Werner Kröninger, Infineon Technologies (Regensburg, Germany)

Thursday, May 24, 2007
  • Buffet lunch served from 11:45 - 12:15 ($15 if reserved by May 21; $20 at door; vegetarian available); presentation at 12:15.

    NOTE: This lunch is INCLUDED in the fee for the half-day short course, "Challenges in Preassembly: Thin Silicon Dice and Developments in Chip Separation". Please see the course description.

    Ramada Inn
  • 1217 Wildwood Ave (Fwy 101 frontage road, between Lawrence Expressway and Great America Parkway), Sunnyvale, (800) 888-3899 -- see map.


  • If you pay using our PayPal link, you are automatically registered for the lunch and meeting
  • Otherwise, for lunch and meeting, pre-register by email to John Jackson,
    Singulation can easily be the most critical step in semiconductor processing -- where a die is physically freed from a wafer. So much torque and force is used during this step that if precautionary steps are not taken, the freed chips may exhibit low strength and chipping damage. The process of singulation is more critical as wafers become more packed, larger in size, thinner and filled with fragile layers. Driven by stacked die and miniaturization, the industry has moved towards thinner silicon wafers of less then 100um in thickness. Singulation of highly thinned wafers without chipping with high die strength at high throughput rates can be a real challenge. Engineers must establish a delicate balance between conservation of silicon real estate packing up the streets and high yield singulation. Has conventional rotary-blade dicing reached its limit with the advent of extremely thin, highly processed and embrittled wafers? Will laser dicing take over? How about separating by thinning?

    Dice before Grind (DBG) promises to be a reliable method to singulate highly thinned and fragile dies. DBG works by reversing the backgrind-to-dicing process flow and instead the wafer is ground after dicing. This brings a paradigm change. Superior strengths on ultrathin chips in mass production have been achieved. The presentation will focus on the many challenges of transferring thin silicon chips in high-volume production.

    Speaker Biography
    Werner Kröninger received his masters degree in physics from the University of Regensburg in 1989. In 1989 and 1990 he worked for the Fraunhofer Institut (ISC) in Würzburg, as scientific collaborator investigating glasses, ceramics and ormoceres (organically modified ceramics).

    From 1990 to 1995 he was with Rodenstock Precision Optics, Munich, developing optical systems as a member of the technology group and managing projects in the industrial optics devision. Since 1995 he has been working at Infineon Technologies, Regensburg. He worked as a senior process engineer for several front-end fields like CVD, epitaxy and tungsten. From 1997 to 2003 he was the responsible manager for preassembly. Today he is working for the corporate group responsible for new developments in wafer-finishing for logic devices as principal preassembly manager. He holds several patents and has numerous international publications.

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