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"Multichip Module Packaging and its Impact on Server Architecture and Operating Systems" -- Dr. Hubert Harrer, Senior Technical Staff Member, IBM Server and Technology Group (Boeblingen, Germany)

Presentation Slides: "Multichip Module Packaging and its Impact on Architecture " (1.1 MB PDF)

MONDAY, October 20, 2008 (special day of week!)

  • Seated dinner served at 6:30 ($25 if reserved by Oct. 16; $30 after & at door; vegetarian available)

  • Presentation (no cost) at 7:30.

    Ramada Inn

  • 1217 Wildwood Ave (Fwy 101 frontage road, between Lawrence Expressway and Great America Parkway), Sunnyvale, (800) 888-3899 -- see map.

    PLEASE RESERVE IN ADVANCE --

  • For dinner and/or meeting: by email to Janis Karklins
  • Please reserve for "presentation-only", even if not attending the dinner.

    OVERVIEW:
        The presentation compares the system packaging and technologies of IBM's latest system z high end servers. Starting from the z900, the system design change towards a blade-like architecture will be explained. The latest system generation z9 has achieved a doubling of the multiprocessor performance compared to the z990 system by maximizing its CPU configuration in combination with increasing the speed of the interconnections.
        The heart of a processor node consists of a multi chip module (MCM) which contains the double-core processor chip, the cache chips and the bus adaptors to the memory and the IO chips. This MCM technology is the key enabler for the high bandwidths between processor chips and the cache chips. The glass ceramic module has accomplished this challenge within the 102 layers resulting in a total wiring length of 545m. The increase of bandwidth requirements for the packaging will be compared for the last generations. Also the complex board and card technology of the second level packaging will be discussed. The cooling of the system is being done with a modular refrigeration unit (MRU), which cools the processor chips down to 45C. This low temperature ensures highest reliability and reduced leakage current of the chips. An air cooled backup mode at a lower frequency ensures that the system does not go down in case of an MRU fail. The MCM has been designed for a maximum power of 850W during nominal operation and 1200W in case of the air-cooled backup mode.
        The presentation will focus on the electrical design methodologies for high end servers like power delivery concepts, signal integrity methodologies and power integrity designs for delivering such high currents.

    Speaker Biography:
    Dr. Hubert Harrer is a Senior Technical Staff Member (STSM) since 2002 working in the IBM Server and Technology Group. He received his Dipl.-Ing. degree in 1989 and his Ph.D. degree in 1992 from the Technical University of Munich. In 1993 he received a DFG research grant to work at the University of California at Berkeley in the paradigm of Cellular Neural Networks. Since 1994 he has worked for IBM in the Boeblingen Packaging Department. In 1999 he was on international assignment at IBM Poughkeepsie, New York. He was leading the z900 MCM designs and is the technical lead for z-series CEC packaging designs since 2001. This includes the system z990 and system z9 mainframe computers. His technical interests focus on packaging technology, high frequency designs and electrical analysis for first and second level packaging. He has published multiple papers and holds 7 patents in the area of packaging.


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