CPMT Chapter, Santa Clara Valley

IEEE Santa Clara Valley CPMT Society Chapter -- Series on high-density packaging

"Wafer Level Packaging – Next Turn in the Road" -- Dr. Thomas Di Stefano, Centipede Systems

Presentation Slides: "Wafer Level Packaging - The Next Turn in the Road" (400 kB PDF)

WEDNESDAY, June 10, 2009

Seated dinner served at 6:30 PM ($25 if reserved by June 8; $30 after & at door; vegetarian available)

Presentation (no cost) at 7:30 PM.

Please register in advance for this event, using our IEEE Council's DoubleKnot registration site.

You may register yourself, plus others from your company/institution, for both dinner and presentation, or for only the presentation. You may make an on-line payment for the dinner, or arrange to pay at the door.

PLEASE RESERVE IN ADVANCE --

For dinner and/or meeting: at the Doubleknot link above.
Please reserve for "presentation-only", even if not attending the dinner. We want to assure we have enough seating.

Biltmore Hotel

2151 Laurelwood Rd (Fwy 101 at Montague Expressway), Santa Clara, (408) 346-4620 -- click map at right.

OVERVIEW:: Wafer Level Packaging has long been the promised land of semiconductor manufacturing, but to many it seems we are still in the wilderness. The promise is as attractive as ever and even more so in an economic environment where continuous cost reduction dictates rationalization of back-end packaging and test. Until now, Wafer Level Packaging has proceeded slowly into larger, high-value devices where a reliable die attach technology is an ongoing issue. Presently, several DRAM manufacturers are readying Wafer Level or Through Silicon Via packaging for production. This next leg upward will require cost-effective infrastructure for burn-in, test and handling. The methods, tools and standards necessary for growth of this supporting infrastructure represent both a problem and an opportunity. It is not at all clear which of several alternative paradigms will win, but one thing is sure -- the back-end infrastructure needs attention and coordinated effort, and perhaps new paradigms for solving long-standing problems known earlier under the rubric "KGD".
Speaker Biography:: Dr. Tom Di Stefano is President of Centipede Systems, a technology based company dedicated to providing MicroConnectors and contactors at the highest levels of density and performance. Prior to Centipede, Tom was the founding President of Tessera, ranked in the top ten hot growth companies by Business Week 2005. He is also a co-founder of Chip Scale Review, a leading magazine in microelectronics technology. Tom is an industry veteran with 19 years of experience at IBM Watson Laboratories. At IBM, he was a member of the IBM Academy of Technology. Tom earned a PhD from Stanford University and BSEE with Highest Honors from Lehigh University. He is an author of more than 220 US Patents and numerous publications in science and technology.

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