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    "Thin is In: Thinning of IC Chips"
    -- Annette Teng, Ph.D., CORWIL Technology Corp.

Presentation Slides: "Thin is In: Thinning of IC Chips" Annette Teng, Ph.D., CORWIL Technology Corp. (800 kB PDF)

Thursday, January 28, 2010

  • Registration at 11:30 AM; Buffet lunch served from 11:45 - 12:15 ($15 if reserved by Sept. 21; $20 at door; $5 for fulltime students and currently unemployed; vegetarian available); presentation (no cost) at 12:15.
    OVERVIEW:
        Silicon chips as thin as 0.050um are becoming common. Many manufacturers have achieved success in their development of thin die. This talk will focus on singulation and thinning techniques to create silicon crystal slices which can withstand the assembly, packaging and field environments. The talk will discuss using die attach films (DAF) to support the ultra-thin dies and to stack dies vertically. The speaker will also address the shifting landscape of the component manufacturing industry, such as the increased use of laser cutting and the outlook for DAF films replacing traditional die-attach epoxy.

    Speaker Biography:
        Annette Teng graduated with M.Sci. and Ph.D. in Materials Engineering from University of Virginia in Charlottesville. Her first job was at Signetics Corp. where she was responsible for failure analysis, development, manufacturing and reliability engineering of both plastic and hermetic packages. She worked at Linear Technology Corp. from 1990 to 1996 in the package assembly for military and commercial products. In 1997 she moved to Hong Kong and launched the Electronic Packaging Lab at The Hong Kong University of Science and Technology with Government funding for flip chip and materials R & D. In 2000, she joined CORWIL Technology Corp, a prototyping assembly contractor located in Silicon Valley. She has overall responsibility in the areas of backgrind, dicing, die attach and flip chip production. She is program manager and staff scientist in charge of developing new manufacturing processes for advanced packaging and wafer level packaging. Annette is very active in IEEE-CPMT and has published papers at ECTC, IEMT and EMAP conferences.

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