IEEE Santa Clara Valley CPMT Society Chapter

"PCB Design and Fabrication Process Variations for Embedding Passive and Active Components"
Vern Solberg, Technical Consultant

• Buffet dinner served at 6:00 PM
  ($25 for IEEE Members, $30 for non-members, if reserved by October 6th) ;
  $10 for fulltime students and currently unemployed engineers
  ($5 more at the door; vegetarian available)

• Presentation (no cost) at 6:45 PM (arrive by 6:30 PM)

  Please register in advance for this event, using our CPMT Chapter's EventBrite registration site.

  You may register yourself, plus others from your company/institution, for both dinner and presentation, or for only the presentation. You may make an on-line payment for the dinner, or arrange to pay at the door.

PLEASE RESERVE IN ADVANCE --
• For dinner and/or meeting: at the EventBrite link above.
• Even if you're coming only for the presentation, we want you to sign up on our registration web site, so we can quicken the sign-in process and get everyone seated by 6:45 PM.
Biltmore Hotel

• 2151 Laurelwood Rd (Fwy 101 at Montague Expressway), Santa Clara, (408) 346-4620 -- click map at right.

  
  

  OVERVIEW:

      Embedding components within the PC board structure is not a new concept, however, until recently, most applications adapted only passive elements. The processes relied on resistive inks and films for the resistor elements and enhanced dielectric layering for capacitors. And although these methods remain viable, many companies have evolved into placing discrete passive and active components within the PC board layering structure. Many have found that by reducing the component population on the PC board’s surface, board level assembly is less complex and the PC board can be made smaller, The smaller substrate, even when more complex, often results in lower cost. Although size and cost reductions are significant attributes, the close coupling of key elements can also contribute to improving functional performance.
      The presentation will focus on the six basic embedded component structure designs described in IPC-7092. The process variations define the structure, depending on whether components are passive or active, placed and/or formed and if they are on one side of the PCB base-core or both. Both formed and placed components may be located on any number of layers, however, formed components are generally assigned to dedicated layers. The layering description actually becomes part of the type designation that is very similar in describing an eight layer (2-4-2) HDI board and the naming indicates whether the base-core represents a final assembly or is simply a mounting base onto which additional layers are sequentially added.

  Speaker Biography:
  

      Vern Solberg is a technical consultant specializing in SMT and microelectronics design and manufacturing technology. He has served the industry for more than twenty-five years in areas related to both commercial and aerospace electronic product development and is active as an author and as an educator. In addition to tutorial and workshop programs for industry related events Mr. Solberg has been involved with the training of both students and faculty members at the University of Wisconsin, School of Engineering in Milwaukee and Kansa State Universities Microelectronics Laboratories in Salina.
      Solberg holds several patents for 3D IC packaging innovations including the folded-flex 3D package technology and is the author of Design Guidelines for Surface Mount and Fine-Pitch Technology a McGraw-Hill publication. Vern also participates in and supports several industry organizations including IPC, SMTA, IEEE and IMAPS.

  
  

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