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    Current Capabilities and Future Challenges of Acoustic Microscopy (AM) for 3D Interconnect & Underfill Inspection
    -- Steve Martell, Manager, Advanced Applications Support, Sonoscan

Thursday, May 21, 2015
  • Registration at 11:30 AM; Lunch ($5; free for IEEE Members with code IEEE2015) served from 11:30 - 12:00
  • Presentation (no cost) at 12:00 noon
  • Please reserve by May 19, so we can provide the food
        Acoustic Microscopy (AM) has been an accepted non-destructive test method for several decades in the microelectronics industry. Capabilities have been developed to meet the needs of the evolving backend and front end of, typically the inspection of smaller and denser microelectronic devices.
        The techniques and capabilities that have been developed for C-SAM systems to inspect flip chip, bonded wafer and MEMS technologies can be applied to 3D IC interconnect, especially in wafer bond quality, thickness, bow, warp, sori and flatness. C-SAM technology can be used to provide qualitative and quantitative data for all current wafer bonding techniques, and to inspect CSP and flip chip interconnects, underfill, and/or bonding for voids, percent bond and delamination.
        The challenges for 3D IC interconnect metrology for Acoustic Microscopy (AM) type systems include the scale of features, thickness/depth of inspection and structure. The state of the art for AM technologies will be discussed that are directly transferrable to 3D IC interconnect metrology as well as the areas that will need to be improved upon to meet the new challenges.

    Speaker Biography:
        Steve Martell, Manager for Advanced Applications Support at Sonoscan, received the IPC President's Award during the IPC APEC EXPO at the San Diego Convention Center on March 3. Soon to celebrate his thirtieth year at Sonoscan, Martell was honored for his service to the electronics industry and to the IPC. His years among Sonoscan's innovative engineers, alongside the world's largest acoustic testing laboratory for components (SonoLab), let him make unique contributions to component and assembly standards, technology and education.
        Over the years he has brought Sonoscan's technological expertise to a number of IPC committees, and currently is a member of nine IPC committees that focus on the standards and applications for acoustic micro imaging of MEMS devices, silicon wafers, 3D ICs, HB-LED devices, plastic chip carrier cracking, counterfeit components and other areas. He is the chairman of two of these committees. Because he deals with applications where Sonoscan's C-SAM technology solves problems, Martell's work covers the entire spectrum from the Front End environment (wafers, ingots) to Mid End (3D ICs) to Back End (electronic components) to populated printed circuit boards.
        In addition to serving as liaison with organizations concerned with standards within the electronics industry, Martell is also responsible for Sonoscan's applications support and especially for automated in-line Acoustic Micro Imaging Systems used in manufacturing. He is currently VP of the FOA (Fab Owners Assn.), a member of the MEPTEC Advisory Board, a member of the University of Florida College of Engineering West Coast Advisory Board, and a Life Member of the IEEE. Phil received a BSEE from University of Florida and an MS-EM from Santa Clara University.

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