IEEE/CPMT Lunch Meeting, in the Santa Clara Valley:

    Emerging IC Packaging Platforms for ICT Systems
    -- Dr. Li Li, Distinguished Engineer, Cisco Systems, Inc.

Thursday, March 24, 2016

• Optional lunch provided ($10 for non-members, $5 for IEEE members/students/unemployed)
• Registration (and sandwiches/drinks) at 11:30 AM
• Presentation-only (no cost) at 12:00 PM noon (come at 11:45 AM)
• Please reserve by the end of April 10, so we can provide the food.

Please register in advance for this event, using our CPMT Chapter's EventBrite registration site.

You may register yourself, plus others from your company/institution, for this lunch and presentation. Please make an on-line payment for the lunch.



LOCATION: Texas Instruments Building E Conference Center
    2900 Semiconductor Dr. (off Kifer Rd), Santa Clara -- click map at right.

OVERVIEW:

    Today, applications such as data center/cloud, mobility and Internet of Things (IoT) are the key market drivers for the semiconductor industry. To meet the requirements of next-generation ICT systems, the packaging technology has to evolve along with the IC technology scaling. At the same time, design and development of packages have to meet cost, performance, form factor and reliability goals. In this talk we will examine new advances in packaging technology to maintain the IC scaling edge, as well as the role of new emerging 2.5D and 3D IC packaging platforms for addressing the gaps seen between the slowdown of Moore's law scaling and the ever increasing system integration requirements. We will also discuss the emerging component technologies such as 3D stacked high-bandwidth DRAM and the implications on supply chain ecosystems for enabling the 3D System-in-Package (SiP) solutions for networking applications.

Speaker Biography:

    Dr. Li Li is a Distinguished Engineer at Cisco Systems, Inc. where he leads an initiative on 3D IC integration and advanced packaging development. He has been with Cisco since 2004 and has over 20 years industry experience in IC package design, technology development and qualification. Dr. Li has published several book chapters and over 50 technical papers in the field of microelectronics packaging. He is on the Board of Governors of IEEE Components, Packaging, and Manufacturing Technology (CPMT) Society and the Board of Directors of HDP User Group International (HDPUG), Inc. He received his M.S. and Ph.D. degrees from the University of Illinois at Urbana-Champaign.