IEEE/CPMT Dinner Meeting, in the Santa Clara Valley:
"High Complexity, Low Cost 3D Sub-Systems as a Large Scale BGA"
-- Shawn Arnold, ChipStack Inc.
Wednesday, October 10, 2007
Seated dinner served at 6:30
($25 if reserved by Oct. 7; $30 after & at door;
Presentation (no cost) at 7:30.
$25 -- Register & prepay for dinner in one step from your PayPal account or Credit/Debit Card!
Ramada Inn1217 Wildwood Ave (Fwy 101 frontage road, between Lawrence Expressway and Great America Parkway), Sunnyvale, (800) 888-3899 -- see map.
PLEASE RESERVE IN ADVANCE --
For dinner and/or meeting: by email to
Please reserve for "presentation-only", even if not attending the dinner.
With the current drive towards increased IC integration and reduced package size, previously low-technology printed circuit
boards (PCBs) are now required to support these packages with higher technology manufacturing requirements. Solutions such as blind/buried vias, higher speed materials, distributed capacitance materials and thin traces/spaces are needed, thus increased costs for the base PCB. Due to increased chip capabilities, it is common to have a single high-technology IC drive the costing of the entire finished product. By isolating this high-tech circuit (the complex IC plus all of it's supporting logic) into a much smaller discrete three-dimensional sub-system and allowing the base PCB to return to a lower technology, the overall product costing can be significantly reduced while compressing required PCB real estate.
- Speaker Biography:
Shawn Arnold is currently the CTO of ChipStack Inc. and holds two Patents with two in process. He has 24 years of industry experience ranging from Product Design to Manufacturing for Sigma Circuits/Tyco, Design Management for an EMS, Signal Integrity expertise, PCB Market Analyst for iSuppli, Business Development Manager for Cadence and Consulting for
numerous Consumer Product related OEMs.
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