IEEE Santa Clara Valley CPMT Society Chapter

"Photoprinting Assembly Technology for Ultrathin Electronic Components" -- Dr. Jayna Sheats, Terepac Corporation

• Buffet dinner served at 6:00 PM ($20 if reserved by Dec. 6); $10 for fulltime students and currently unemployed engineers; $5 more at the door; vegetarian available)

• Presentation (no cost) at 6:45 PM

  Please register in advance for this event, using our IEEE Council's DoubleKnot registration site.

  You may register yourself, plus others from your company/institution, for both dinner and presentation, or for only the presentation. You may make an on-line payment for the dinner, or arrange to pay at the door.

PLEASE RESERVE IN ADVANCE --
• For dinner and/or meeting: at the Doubleknot link above.
• Please reserve for "presentation-only", even if not attending the dinner. We want to assure we have enough seating.
Biltmore Hotel

• 2151 Laurelwood Rd (Fwy 101 at Montague Expressway), Santa Clara, (408) 346-4620 -- click map at right.

  
  

  OVERVIEW:

      Packaging continues to push toward smaller and thinner assemblies to accommodate the demands of mobile consumer products. 3D integration provides another driver for the use of ultrathin components. The wireless sensors market, envisioned by many to be in the trillions, requires microprocessors with tens of thousands of transistors and memory in the kilobyte range. These devices need to be very inexpensive and typically, flexible and small.
      We have developed an assembly and packaging technology which can effectively handle electronic components of almost any useful size, down to the micron scale in both thickness and lateral size. Interconnections are printed from soluble precursors, allowing for much smaller I/O pad periods than solder bumping or wirebonding. Flexibility is achieved without any compromise in electrical performance compared to conventional packaging.
      The ability to package ultrathin components rests on a process in which parts are transferred from diced wafer directly to a “printing plate”, and then released by the action of light and heat on a photoactive polymer. Thus the complex mechanical action of the pick and place process is replaced by photoprinting, requiring much simpler mechanics with increased throughput. While our emphasis has been on low part count products such as smart cards and simple wireless sensors, the technique can also handle larger (cm-scale) dice, and could provide an alternative for stacking bare die in wafer level packages.

  Speaker Biography:
  

      Dr. Jayna Sheats is a co-founder of Terepac Corporation and has been its full-time CTO since 2008. From 2004 until 2008 she served as Vice President of Manufacturing Technology and subsequently Associate CTO at Nanosolar, Inc. Before that, she spent two years in consulting and entrepreneurial development in thin film electronics, particularly involving roll-to-roll processing techniques, and was a co-founder of two companies and advisor to several (including Nanosys, Nanosolar, Appleton Paper, and others). Prior to this, she spent 20 years at HP Labs, working on a wide variety of projects in thin film electronics, including microlithography, superconductivity, and electro-luminescence. She also initiated and supported a program to introduce Internet technology in the developing world. Palo Alto based and a fellow of the American Association for the Advancement of Science, she holds a Ph.D. in physical chemistry from Stanford University, has published 55 journal articles and filed more than 34 patents, with 20 presently issued.

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