IEEE Santa Clara Valley CPMT Society Chapter - co-sponsored by SCV Photonics Chapter

"A Survey and Review of 2.5/3D IC Packaging Technologies"
Herb Reiter, eda2asic Consulting, Inc.

WEDNESDAY, April 9, 2014

• Buffet dinner served at 6:00 PM ($20 if reserved by April 7th) ; $10 for fulltime students and currently unemployed engineers
  ($5 more at the door; vegetarian available)

• Presentation (no cost) at 6:45 PM (arrive by 6:35 PM)

  Please register in advance for this event, using our CPMT Chapter's EventBrite registration site.

  You may register yourself, plus others from your company/institution, for both dinner and presentation, or for only the presentation. You may make an on-line payment for the dinner, or arrange to pay at the door.

PLEASE RESERVE IN ADVANCE --
• For dinner and/or meeting: at the EventBrite link above.
• Even if you're coming only for the presentation, we want you to sign up on our registration web site, so we can quicken the sign-in process and get everyone seated by 6:45 PM.
Biltmore Hotel

• 2151 Laurelwood Rd (Fwy 101 at Montague Expressway), Santa Clara, (408) 346-4620 -- click map at right.

  
  

  OVERVIEW:

      Continued shrinking of logic circuits -- Moore's Law -- is getting technically more and more difficult and extremely costly. Many applications require logic as well as integration of memory, analog/RF, MEMS, sensors and other functions. Package-on-Package (PoP), System-in-Package (SiP) and other such solutions have been developed, but can't meet current and projected system requirements for speed and power. New solutions such as 2.5D [IC dice placed side by side on an interposer], and 3D [multiple IC die stacked vertically within one package] seem to be the Holy Grail that everyone is after.
      In part 1 (from 7 to 8 PM) of this presentation Mr. Reiter will outline the reasons for this ongoing transition to 2.5/3D-ICs, highlighting their features and benefits. He will discuss design and manufacturing changes needed to meet the economic and manufacturing challenges. Some examples of designs currently in production, in prototype-evaluation, and planned designs will be presented.
      In part 2 (starting about 8 PM), based on an on-site survey of topics of interest, specific areas of interest to the audience will be discussed in greater depth.

  Speaker Biography:
  

      After more than 20 years in technical and business roles at semiconductor and EDA companies, Herb Reiter founded eda2asic Consulting, Inc. in 2002. He planned to focus on interactions between EDA and ASIC vendors but life suggested a much broader scope, and Herb has been working on 3D-IC since 2008.
      Herb earned his Masters in Business Administration from Johannes Kepler University, and MS in Electrical Engineering from HTL (Higher Technical College) in Linz, Austria, and an MBA from San Jose State University. He has taken numerous Continuing Education courses at Stanford University.

  
  

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