IEEE Santa Clara Valley CPMT Society Chapter Seminar

"Moore's Law for System Integration" -- a 2-Hour IEEE Seminar -- Prof. Rao Tummala, Founding Director, NSF Packaging Research Center, Georgia Tech (and past IBM Fellow)

    Tuesday, October 12, 2010

• Come meet a legend in packaging and system integration!

• Registration from 2:30 - 3:00 PM; Seminar from 3:00 - 5:00 PM (details below).

• Cost: $25 for IEEE members; $35 for non-members, $10 for fulltime students and currently unemployed engineers; if reserved by Oct. 9 by Oct. 11 -- $5 more after & at door (if space is available).

• We invite you to also attend the regular Chapter dinner that evening at the Biltmore; please register separately for the dinner and/or Dr. Tummala's evening talk, "All-Silicon System with Nano-Packaging: Highest Functionality, Lowest Cost, Smallest Size".

  Please register in advance for this IEEE Seminar, using our IEEE Council's DoubleKnot registration site.

  You may register yourself, plus others from your company/institution, for both dinner and presentation, or for only the presentation. You may make an on-line payment for the dinner, or arrange to pay at the door.

Biltmore Hotel

• 2151 Laurelwood Rd (Fwy 101 at Montague Expressway), Santa Clara, (408) 346-4620 -- click map at right.

  
  

  OVERVIEW:

      Electronics has been and continues to be one of the largest global industries, with $1.4 T market value. It has been the driving engine for science, engineering and manufacturing, leading to the global prosperity in those parts of the world that invested and participated in it. The first electronics wave, which started with the invention of the transistor, has been largely due to Moore's Law based on CMOS, or the First Law of Electronics, and the associated hybrid and discrete component-based approach to system integration using 100s of discrete components made of ceramics, organics, silicon, metals, solders and alloys. This CMOS-based era is beginning to pose major barriers beyond 22 nm due to design complexity, minimal performance gain and escalating wafer costs.

      A new era has begun to emerge, the focus of which is on 3D ICs instead of monolithic integration of heterogeneous functions. While the impact of this approach is profound, it addresses a small part of the system. What is necessary is another paradigm shift to Moore’s Law for System Integration leading to unparalleled miniaturization, functionality and cost at system level. This is the focus of this presentation with with nanoscale components for actives, passives, thermal interfaces, System interconnections, and batteries at micro and nano-scales.

  Speaker Biography:
  

      Prof. Rao Tummala is Distinguished and Endowed Chair Professor, and Founding Director of NSF ERC at Georgia Tech, the largest Academic Center in Microsystems, pioneering a System-On-Package (SOP) vision, since 1994. Prior to joining Georgia Tech, he was an IBM Fellow, developing such major technologies as the first plasma flat panel display based on gas discharge, the first and next three generations of multichip packaging based on 35-layer alumina and 61-layer LTCC with copper and copper-polymer thin film, and materials for ink-jet printing and magnetic storage.

      He has received many industry, academic and professional society awards including Industry Week’s award for improving U.S. competitiveness, IEEE’s David Sarnoff, Major Education and Sustained Technical awards, Dan Hughes award from IMAPS, Engineering Materials Achievement award from DVM and ASM-International, Total Excellence in Manufacturing award from SME, John Jeppson's award from the American Ceramic Society as well as the Distinguished Alumni Awards from the University of lllinois, the Indian Institute of Science, Bangalore and Georgia Tech. He received his BS from llSc, Bangalore and his Ph.D. from the University of lllinois.

      Prof. Tummala has published 426 technical papers; holds 74 patents and inventions; authored the first modern packaging reference book Microelectronics Packaging Handbook (Van Nostrand, 1988) and the first undergrad textbook Fundamentals of Microsystems Packaging (McGraw Hill, 2001) and the first book introducing the System-On-Package technology. He is a Fellow of IEEE, IMAPS, and the American Ceramic Society, and member of the National Academy of Engineering in the USA and in India. He has served as President of both IEEE-CPMT and the IMAPS Societies.

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